MC68HC708MP16 Datasheet, PDF (164/398 Pages) Freescale Semiconductor, Inc – Microcontrollers

Pulse Width Modulator for Motor Control (PWMMC)
BIT7
DISABLE
PWM PIN 1
BIT6
DISABLE
BIT5
PWM PIN 2
BIT4
BANK X
DISABLE
BANK Y
BIT3
DISABLE
DISABLE
PWM PIN 3
DISABLE
PWM PIN 4
BIT2
DISABLE
BIT1
PWM PIN 5
BIT0
DISABLE
PWM PIN 6
Figure 9-34. PWM Disabling Decode Scheme
9.7.1 Fault Condition Input Pins
A logic high level on a fault pin disables the respective PWM(s)
determined by the bank and the disable mapping register. Each fault pin
incorporates a filter to assist in rejecting spurious faults. All of the
external fault pins are software-configurable to re-enable the PWMs
either with the fault pin (automatic mode) or with software (manual
mode). Each fault pin has an associated FMODE bit to control the PWM
re-enabling method. Automatic mode is selected by setting the FMODEx
bit in the fault control register. Manual mode is selected when FMODEx
is clear.
Technical Data
164
MC68HC708MP16 — Rev. 3.1
Pulse Width Modulator for Motor Control (PWMMC) Freescale Semiconductor