MC68HC708MP16 Datasheet, PDF (256/398 Pages) Freescale Semiconductor, Inc – Microcontrollers

Serial Peripheral Interface Module (SPI)
Only a master SPI module can initiate transmissions. Software begins
the transmission from a master SPI module by writing to the transmit
data register. If the shift register is empty, the byte immediately transfers
to the shift register, setting the SPI transmitter empty bit, SPTE. The byte
begins shifting out on the MOSI pin under the control of the serial clock.
See Figure 13-3.
The SPR1 and SPR0 bits control the baud rate generator and determine
the speed of the shift register. (See 13.14.2 SPI Status and Control
Register.) Through the SPSCK pin, the baud rate generator of the
master also controls the shift register of the slave peripheral.
As the byte shifts out on the MOSI pin of the master, another byte shifts
in from the slave on the master’s MISO pin. The transmission ends when
the receiver full bit, SPRF, becomes set. At the same time that SPRF
becomes set, the byte from the slave transfers to the receive data
register. In normal operation, SPRF signals the end of a transmission.
Software clears SPRF by reading the SPI status and control register with
SPRF set and then reading the SPI data register. Writing to the SPI data
register clears the SPTE bit.
When the DMAS bit is set, the SPI status and control register does not
have to be read to clear the SPRF bit. A read of the SPI data register by
the CPU clears the SPRF bit. A write to the SPI data register by the CPU
clears the SPTE bit.
MASTER MCU
SHIFT REGISTER
BAUD RATE
GENERATOR
MISO
MOSI
SPSCK
SS
SLAVE MCU
MISO
MOSI
SPSCK
SHIFT REGISTER
V_DD
SS
Figure 13-3. Full-Duplex Master-Slave Connections
Technical Data
256
Serial Peripheral Interface Module (SPI)
MC68HC708MP16 — Rev. 3.1
Freescale Semiconductor