MC68HC708MP16 Datasheet, PDF (244/398 Pages) Freescale Semiconductor, Inc – Microcontrollers

Timer Interface Module B (TIMB)
12.9.4 TIMB Channel Status and Control Registers
Each of the TIMB channel status and control registers does the
following:
• Flags input captures and output compares
• Enables input capture and output compare interrupts
• Selects input capture, output compare, or PWM operation
• Selects high, low, or toggling output on output compare
• Selects rising edge, falling edge, or any edge as the active input
capture trigger
• Selects output toggling on TIMB overflow
• Selects 100% PWM duty cycle
• Selects buffered or unbuffered output compare/PWM operation
TBSC0
$0044
Read:
Write:
Bit 7
CH0F
0
6
CH0IE
5
MS0B
4
MS0A
3
2
ELS0B ELS0A
1
Bit 0
TOV0 CH0MAX
Reset: 0
0
0
0
0
0
0
0
TBSC1
$0047 Bit 7
6
5
4
3
2
1
Bit 0
Read: CH1F
CH1IE
0
MS1A ELS1B ELS1A TOV1 CH1MAX
Write:
0
Reset: 0
0
0
0
0
0
0
0
TBSC2
$004A
Read:
Write:
Bit 7
CH2F
0
6
CH2IE
5
MS2B
4
MS2A
3
ELS2B
2
ELS2A
1
Bit 0
TOV2 CH2MAX
Reset: 0
0
0
0
0
0
0
0
TBSC3
$004D Bit 7
6
5
4
3
2
1
Bit 0
Read: CH3F
CH3IE
0
MS3A ELS3B ELS3A TOV3 CH3MAX
Write:
0
Reset: 0
0
0
0
0
0
0
0
= Unimplemented
Figure 12-7. TIMB Channel Status and Control Registers
(TBSC0:TBSC3)
Technical Data
244
Timer Interface Module B (TIMB)
MC68HC708MP16 — Rev. 3.1
Freescale Semiconductor