MC68HC708MP16 Datasheet, PDF (138/398 Pages) Freescale Semiconductor, Inc – Microcontrollers

Pulse Width Modulator for Motor Control (PWMMC)
Table 9-2. PWM Reload Frequency
Reload Frequency Bits
LDFQ1:LDFQ0
00
01
10
11
PWM Reload Frequency
Every PWM cycle
Every 2 PWM cycles
Every 4 PWM cycles
Every 8 PWM cycles
For ease of software, the LDFQx bits are buffered. When the LDFQx bits
are changed, the reload frequency will not change until the previous
reload cycle is completed. See Figure 9-5.
NOTE: When reading the LDFQx bits, the value is the buffered value (for
example, not necessarily the value being acted upon).
RELOAD
RELOAD
RELOAD
CHANGE RELOAD
FREQUENCY TO
EVERY 4 CYCLES
RELOAD RELOAD RELOAD RELOAD
CHANGE RELOAD
FREQUENCY TO
EVERY CYCLE
Figure 9-5. Reload Frequency Change
PWMINT enables CPU interrupt requests as shown in Figure 9-6. When
this bit is set, CPU interrupt requests are generated when the PWMF bit
is set. When the PWMINT bit is clear, PWM interrupt requests are
inhibited. PWM reloads will still occur at the reload rate, but no interrupt
requests will be generated.
Technical Data
138
MC68HC708MP16 — Rev. 3.1
Pulse Width Modulator for Motor Control (PWMMC) Freescale Semiconductor