MC68HC708MP16 Datasheet, PDF (336/398 Pages) Freescale Semiconductor, Inc – Microcontrollers

Computer Operating Properly (COP)
16.4.4 Internal Reset
An internal reset clears the SIM counter and the COP counter.
16.4.5 Reset Vector Fetch
A reset vector fetch occurs when the vector address appears on the data
bus. A reset vector fetch clears the SIM counter.
16.4.6 COPD (COP Disable)
The COPD signal reflects the state of the COP disable bit (COPD) in the
configuration register (CONFIG). (See Section 5. Configuration
Register (CONFIG).)
16.5 COP Control Register
The COP control register is located at address $FFFF and overlaps the
reset vector. Writing any value to $FFFF clears the COP counter and
starts a new timeout period. Reading location $FFFF returns the low
byte of the reset vector.
Address: $FFFF
Bit 7
6
5
4
3
2
1
Bit 0
Read:
Low byte of reset vector
Write:
Reset:
Writing to $FFFF clears COP counter
Unaffected by reset
Figure 16-3. COP Control Register (COPCTL)
Technical Data
336
Computer Operating Properly (COP)
MC68HC708MP16 — Rev. 3.1
Freescale Semiconductor