MC68HC708MP16 Datasheet, PDF (215/398 Pages) Freescale Semiconductor, Inc – Microcontrollers

Timer Interface Module A (TIMA)
11.9.1 TIMA Status and Control Register
The TIMA status and control register does the following:
• Enables TIMA overflow interrupts
• Flags TIMA overflows
• Stops the TIMA counter
• Resets the TIMA counter
• Prescales the TIMA counter clock
Address: $000C
Bit 7
6
5
4
3
Read: TOF
0
0
TOIE TSTOP
Write:
0
TRST
2
1
Bit 0
PS2
PS1
PS0
Reset: 0
0
1
0
0
0
0
0
= Unimplemented
Figure 11-4. TIMA Status and Control Register (TASC)
TOF — TIMA Overflow Flag Bit
This read/write flag is set when the TIMA counter resets to $0000 after
reaching the modulo value programmed in the TIMA counter modulo
registers. Clear TOF by reading the TIMA status and control register
when TOF is set and then writing a logic 0 to TOF. If another TIMA
overflow occurs before the clearing sequence is complete, then
writing logic 0 to TOF has no effect. Therefore, a TOF interrupt
request cannot be lost due to inadvertent clearing of TOF. Reset
clears the TOF bit. Writing a logic 1 to TOF has no effect.
1 = TIMA counter has reached modulo value
0 = TIMA counter has not reached modulo value
TOIE — TIMA Overflow Interrupt Enable Bit
This read/write bit enables TIMA overflow interrupts when the TOF bit
becomes set. Reset clears the TOIE bit.
1 = TIMA overflow interrupts enabled
0 = TIMA overflow interrupts disabled
MC68HC708MP16 — Rev. 3.1
Freescale Semiconductor
Timer Interface Module A (TIMA)
Technical Data
215