XRT79L71_1 Datasheet, PDF (97/434 Pages) Exar Corporation – 1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC -

REV. 1.0.0
XRT79L71
1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC - REGISTER/MAP DESCRIPTION
BIT NUMBER
NAME
TYPE
DESCRIPTION
7
DS3 AIS - Unframed "All- R/W DS3 AIS - Unframed "All-Ones" - AIS Pattern:
Ones"
This READ/WRITE bit-field, (along with the Non-Stuck-Stuff bit)
permits the user specify the AIS Declaration criteria for the
Receive DS3 Framer block, as described below.
0 - Configures the Receive DS3 Framer block to declare the AIS
defect condition, when receiving a DS3 signal carrying a framed
1010.. pattern.
1 - Configures the Receive DS3 Framer block to declare an AIS
condition, when receiving either an unframed, "All-Ones" pattern
or a framed 1010.. pattern.
6
DS3 AIS -Non-Stuck Stuff R/W DS3 AIS -Non-Stuck-Stuff Option - AIS Pattern:
This READ/WRITE bit-field (along with the Unframed "All-Ones"
- AIS Pattern bit-field) permits the user to define the AIS Defect
Declaration criteria for the Receive DS3 Framer block, as
described below.
0 - Configures the Receive DS3 Framer block to require that all
C bits are set to "0" before it will declare the AIS defect condition.
1 - Configures the Receive DS3 Framer block to NOT require
that all C bits are set to "0" before it will declare the AIS defect
condition. In this mode, no attention will be paid to the state of
the "C" bits within the incoming DS3 data-stream.
5
Unused
R/O
4
Receive LOS Pattern
R/W Receive LOS Pattern:
This READ/WRITE bit-field permits the user to define the LOS
Defect Declaration criteria for the Receive DS3 Framer block, as
described below.
0 - Configures the Receive DS3 Framer block to declare the
LOS defect condition if it receives a string of a specific length of
consecutive zeros.
1 - Configures the Receive DS3 Framer block to declare the
LOS defect condition if it receives a string (of a specific length) of
consecutive ones.
NOTE: This bit-field is only enabled if the "Internal LOS Enable"
feature has been enabled within the Receive DS3/E3
Framer block.
3-0
Receive DS3 Idle
Pattern[3:0]
R/W Receive DS3 Idle Pattern:
These READ/WRITE bit-fields permit the user to specify the pat-
tern in which the Receive DS3 Framer block will recognize as
the DS3 Idle Pattern.
NOTE: The Bellcore GR-499-CORE specified value for the Idle
Pattern is a framed repeating "1, 1, 0, 0…" pattern.
Therefore, if the user wishes to configure the Receive
DS3 Framer block to declare an Idle Pattern when it
receives this pattern, then the user write the value [1100]
into these bit-fields.
RECEIVE E3, ITU-T G.751 RELATED REGISTERS
88