XRT79L71_1 Datasheet, PDF (304/434 Pages) Exar Corporation – 1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC -

XRT79L71
1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC - REGISTER/MAP DESCRIPTION
REV. 1.0.0
BIT NUMBER
NAME
7-0
User Cell Filter # 2 -
Check Register - Header
Byte 3
TYPE
R/W
DESCRIPTION
User Cell Filter # 2 - Check Register - Header Byte 3:
The User Cell filtering criteria (for User Cell Filter # 2) is defined
based upon the contents of 9 read/write registers. These regis-
ters are the four "Receive ATM Cell Processor Block - Receive
User Cell Filter # 2 - Pattern Registers", the four "Receive ATM
Cell Processor Block - Receive User Cell Filter # 2 - Check Reg-
isters" and the "Receive ATM Cell Processor Block - Receive
User Cell Filter # 2 Control Register.
This READ/WRITE register, along with the "Receive ATM Cell
Processor Block - Receive User Cell Filter # 2 - Pattern Register
- Header Byte 3" permits the user to define the User Cell Filtering
criteria for "Octet # 3" within the incoming User Cell. More spe-
cifically, these READ/WRITE register bits permit the user to
specify which bit(s) in "Octet 3" of the incoming user cell (in the
Receive ATM Cell Processor Block) are to be checked against
the corresponding bit-fields within the "Receive ATM Cell Pro-
cessor Block - Receive User Cell Filter # 2 - Pattern Register -
Header Byte 3" by the User Cell Filter, when determine whether
to "filter" a given User Cell.
Writing a "1" to a particular bit-field in this register, forces the
User Cell Filter to check and compare the corresponding bit in
"Octet # 3" (of the incoming user cell) with the corresponding bit
in the "Receive ATM Cell Processor Block - Receive User Cell
Filter # 2 - Pattern Register - Header Byte 3".
Writing a "0" to a particular bit-field in this register causes the
User Cell Filter to treat the corresponding bit within "Octet # 3"
(in the incoming user cell) as a "don't care" (e.g., to forgo the
comparison between the corresponding bit in "Octet # 3" of the
incoming user cell with the corresponding bit-field in the
"Receive ATM Cell Processor Block - Receive User Cell Filter #
2 - Pattern Register - Header Byte 3").
Receive ATM Cell Processor Block - Receive User Cell Filter # 2 - Check Register - Byte 4 (Address =
0x176B)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
User Cell Filter # 2 - Check Register - Byte 4 [7:0]
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
295