XRT79L71_1 Datasheet, PDF (133/434 Pages) Exar Corporation – 1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC -

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XRT79L71
1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC - REGISTER/MAP DESCRIPTION
Receive E3 SSM Register - G.832 (Address = 0x112C)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
RxSSM
Enable
MF[1:0]
Reserved
R/W
R/O
R/O
R/O
R/O
0
0
0
0
0
BIT 2
BIT 1
RxSSM[3:0]
R/O
R/O
0
0
BIT 0
R/O
0
BIT NUMBER
NAME
7
RxSSM Enable
6-5
MF[1:0]
4
3-0
Unused
RxSSM[3:0]
TYPE
R/W
R/O
R/O
R/O
DESCRIPTION
Receive SSM Enable:
This READ/WRITE bit-field permits the user to configure the
Receive E3 Framer block to operate in either the Old ITU-T
G.832 Framing format or in the New ITU-T G.832 Framing for-
mat.
0 - Configures the Receive E3 Framer block to support the Pre
October 1998 version of the E3, ITU-T G.832 Framing format.
1 - Configures the Receive E3 Framer block to support the Octo-
ber 1998 version of the E3, ITU-T G.832 framing format.
NOTE:
If the user configures the Receive E3 Framer block to
support the October 1998 Version of the E3, ITU-T
G.832 Framing format, then the Receive SSM Controller
block will be enabled.
Multi-Frame Identification:
These READ-ONLY bit-fields reflect the current frame number,
within the Received Multi-Frame.
NOTE: These bit-fields are only active if the Receive SSM
Controller block is active, and if Bit 7 (RxSSM Enable) of
this register is set to "1".
Receive Synchronization Status Message[3:0]:
These READ-ONLY bit-fields reflect the content of the SSM bits,
within the most recently received SSM Multi-frame.
NOTE: These bit-fields are only active if the Receive SSM
Controller block is active, and if Bit 7 (RxSSM Enable) of
this register is set to "1".
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