XRT79L71_1 Datasheet, PDF (367/434 Pages) Exar Corporation – 1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC -

REV. 1.0.0
XRT79L71
1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC - REGISTER/MAP DESCRIPTION
Transmit ATM Cell Processor Block - Transmit ATM Cell Counter - Byte 2 (Address = 0x1F29)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Transmit ATM Cell Count[23:16]
RUR
RUR
RUR
RUR
RUR
RUR
RUR
RUR
0
0
0
0
0
0
0
0
BIT NUMBER
NAME
7-0
Transmit ATM Cell
Count[23:16]
TYPE
RUR
DESCRIPTION
Transmit ATM Cell Count - Byte 2[23:16]:
This RESET-upon-READ register, along with the Transmit ATM
Cell Count - Bytes 3, 1 and 0 registers, contain a 32-bit value for
the number of User/Valid cells that have been transmitted by the
Transmit ATM Cell Processor block.
NOTES:
1. The contents within these registers include all of the
following: All ATM cells that have been read out from
the TxFIFO, or the Transmit Cell Insertion Buffer.
2. The contents of these registers do not include the
number of Idle Cells that have been generated by the
Transmit ATM Cell Processor block.
3. If the number of Cells reaches the value "0xFFFFFFFF"
then these registers will saturate to and remain at this
value (e.g., it will NOT overflow to "0x00000000").
Transmit ATM Cell Processor Block - Transmit ATM Cell Counter - Byte 1 (Address = 0x1F2A)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Transmit ATM Cell Count[15:8]
RUR
RUR
RUR
RUR
RUR
RUR
RUR
RUR
0
0
0
0
0
0
0
0
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