XRT79L71_1 Datasheet, PDF (226/434 Pages) Exar Corporation – 1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC -

XRT79L71
1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC - REGISTER/MAP DESCRIPTION
REV. 1.0.0
BIT
NUMBER
NAME
6
SFM Clock Out Enable
TYPE
R/W
5
SFM Enable
R/W
DEFAULT
VALUE
0
0
DESCRIPTION
Single-Frequency Mode - Clock Output Enable:
This READ/WRITE bit-field permits the user to either enable
or disable the CLKOUT output pin (Ball K16) of the
XRT79L71.
If the CLKOUT output pin is enabled, then it will output a
replicate of the Reference Clock signal that is currently
being used by the Clock Recovery and Jitter Attenuator
PLL’s within the Receive DS3/E3 LIU Block.
If the XRT79L71 is operating in the DS3 Mode, then a
44.736MHz clock signal will be output via the CLKOUT out-
put pin. Conversely, if the XRT79L71 is operating in the E3
Mode, then a 34.368MHz clock signal will be output via the
CLKOUT output pin.
If the XRT79L71 has been configured to operate in the SFM
(Single-Frequency) Mode, then the Reference Clock signal
(that is ultimately synthesized by the SFM Synthesizer cir-
cuitry) will be output via the CLKOUT signal (if enabled). If
the XRT79L71 has NOT been configured to operate in the
SFM Mode, then the Receive DS3/E3 LIU Block will simply
output a replicate of the signal that it is using as an internal
reference. If the XRT79L71 is operating in the DS3 Mode,
then the CLKOUT signal will ultimately be a buffered ver-
sion of the clock signal being applied at the DS3CLK input
pin. Likewise, if the XRT79L71 is operate in the E3 Mode,
then the CLKOUT signal will ultimately be a buffered ver-
sion of the clock signal being applied at the E3CLK input
pin.
NOTES:
1. The user does not need to configure the Receive
DS3/E3 LIU Block to operate in the SFM Mode, in
order to enable the CLKOUT output pin.
2. The CLKOUT signal is NOT derived from the LIU
Recovered Clock signal.
Single-Frequency Mode Enable:
This READ/WRITE bit-field permits the user to configure the
Receive DS3/E3 LIU Block (within the XRT79L71) to oper-
ate in the Single-Frequency Mode.
If the user configures the Receive DS3/E3 LIU Block to
operate in the Single-Frequency Mode, then all of the fol-
lowing will be true.
• The user only needs to supply a 12.288MHz clock signal
to the DS3CLK input pin (Ball P16).
• The Receive DS3/E3 LIU Block will internally synthesize
the appropriate reference clock signal for itself,
depending whether it has been configured to operate in
the DS3 or E3 Mode.
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