XRT79L71_1 Datasheet, PDF (331/434 Pages) Exar Corporation – 1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC -

REV. 1.0.0
XRT79L71
1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC - REGISTER/MAP DESCRIPTION
Receive PPP Packet Processor - FCS Error Count Register - Byte 1 (Address = 0x1716)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
FCS_Error_Count[15:8]
RUR
RUR
RUR
RUR
RUR
RUR
RUR
0
0
0
0
0
0
0
BIT 0
RUR
0
BIT NUMBER
NAME
7-0
FCS_Error_Count[15:8]
TYPE
RUR
DESCRIPTION
FCS Error Count[15:8]:
These RESET-upon-READ bit-fields, along with that of the
Receive PPP Packet Processor - FCS Error Count Registers -
Bytes 3, 2 and 0 contain a 32-bit expression for the number of
PPP Packets that have been flagged as containing FCS errors
by the Receive PPP Packet Processor block.
Receive PPP Packet Processor - FCS Error Count Register - Byte 0 (Address = 0x1717)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
FCS_Error_Count[7:0]
RUR
RUR
RUR
RUR
RUR
RUR
RUR
0
0
0
0
0
0
0
BIT 0
RUR
0
BIT NUMBER
NAME
7-0
FCS_Error_Count[7:0]
TYPE
RUR
DESCRIPTION
FCS Error Count[7:0]:
These RESET-upon-READ bit-fields, along with that of the
Receive PPP Packet Processor - FCS Error Count Registers -
Bytes 3 through 1 contain a 32-bit expression for the number of
PPP Packets that have been flagged as containing FCS errors
by the Receive PPP Packet Processor block.This particular reg-
ister contains the MSB (Most Significant Byte) value for this 32-
bit expression.
322