XRT79L71_1 Datasheet, PDF (86/434 Pages) Exar Corporation – 1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC -

XRT79L71
1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC - REGISTER/MAP DESCRIPTION
REV. 1.0.0
Receive DS3 Interrupt Enable Register (Address = 0x1112)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
Detection of
CP Bit Error
Interrupt
Enable
Change of
LOS Defect
Condition
Interrupt
Enable
Change of
AIS Defect
Condition
Interrupt
Enable
Change of
Idle
Condition
Interrupt
Enable
Change of
FERF Defect
Condition
Interrupt
Enable
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
BIT 2
Change of
AIC State
Interrupt
Enable
R/W
0
BIT 1
BIT 0
Change of
OOF Defect
Condition
Interrupt
Enable
Detection of
P-Bit Error
Interrupt
Enable
R/W
R/W
0
0
BIT NUMBER
NAME
7
Detection of CP Bit Error
Interrupt Enable
6
Change of LOS Defect
Condition Interrupt
Enable
5
Change of AIS Defect
Condition Interrupt
Enable
TYPE
R/W
R/W
R/W
DESCRIPTION
Detection of CP-Bit Error Interrupt Enable:
This READ/WRITE bit-field permits the user to either enable or
disable the Detection of CP-Bit Error Interrupt, within the Chan-
nel. If the user enables this interrupt, then the Receive DS3/E3
Framer block will generate an interrupt anytime it detects CP bit
errors.
0 - Disables the Detection of CP Bit Error Interrupt.
1 - Enables the Detection of CP-Bit Error Interrupt.
NOTE: This bit-field is only active if the XRT79L71 has been
configured to operate in the DS3, C-bit Parity Framing
Format.
Change in LOS Defect Condition Interrupt Enable:
This READ/WRITE bit-field permits the user to either enable or
disable the Change in LOS (Loss of Signal) Defect Condition
Interrupt, within the XRT79L71. If the user enables this interrupt,
then the Receive DS3/E3 Framer block will generate an interrupt
in response to either of the following conditions.·
• The instant that the Receive DS3/E3 Framer block declares
the LOS defect condition.
• The instant that the Receive DS3/E3 Framer block clears the
LOS defect condition.
0 - Disables the Change in LOS Defect Condition Interrupt.
1 - Enables the Change in LOS Defect Condition Interrupt.
Change in AIS Defect Condition Interrupt Enable:
This READ/WRITE bit-field permits the user to either enable or
disable the Change in AIS (Alarm Indication Signal) Defect Con-
dition Interrupt, within the XRT79L71. If the user enables this
interrupt, then the Receive DS3/E3 Framer block will generate
an interrupt in response to either of the following conditions.·
• The instant that the Receive DS3/E3 Framer block declares
the AIS defect condition.
• The instant that the Receive DS3/E3 Framer block clears the
AIS defect condition.
0 - Disables the Change in AIS Defect Condition Interrupt.
1 - Enables the Change in AIS Defect Condition Interrupt.
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