XRT79L71_1 Datasheet, PDF (96/434 Pages) Exar Corporation – 1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC -

XRT79L71
1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC - REGISTER/MAP DESCRIPTION
REV. 1.0.0
BIT NUMBER
NAME
1
End of Message
0
Flag Present
TYPE
R/O
R/O
DESCRIPTION
End of Message Indicator:
This READ-ONLY bit-field indicates whether or not the Receive
LAPD Controller block has received a complete LAPD Message,
as described below.
0 - Receive LAPD Controller block is currently receiving a LAPD
Message, but has not received the complete message.
1 - Receive LAPD Controller block has received a complete
LAPD Message.
NOTES:
1. Once the Receive LAPD Controller block sets this bit-
field "High", this bit-field will remain high, until the
Receive LAPD Controller block begins to receive a new
LAPD Message.
2. This bit-field is only active if the XRT79L71 has been
configured to operate in the DS3, C-bit Parity Framing
format.
Receive Flag Sequence Indicator:
This READ-ONLY bit-field indicates whether or not the Receive
LAPD Controller block is currently receiving the Flag Sequence
(e.g., a continuous stream of 0x7E octets within the Data Link
channel), as described below
.0 - Indicates that the Receive LAPD Controller block is NOT cur-
rently receiving the Flag Sequence octet.
1 - Indicates that the Receive LAPD Controller block is currently
receiving the Flag Sequence octet.
NOTE: This bit-field is only active if the XRT79L71 has been
configured to operate in the DS3, C-bit Parity Framing
format.
Receive DS3 Pattern Register (Address = 0x112F)
BIT 7
BIT 6
BIT 5
BIT 4
DS3 AIS-
Unframed
"All-Ones"
DS3 AIS
Non Stuck
Stuff
Unused
Receive LOS
Pattern
R/W
R/W
R/O
R/W
0
0
0
0
BIT 3
BIT 2
BIT 1
Receive DS3 Idle Pattern[3:0]
BIT 0
R/W
R/W
R/W
R/W
1
1
0
0
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