XRT79L71_1 Datasheet, PDF (212/434 Pages) Exar Corporation – 1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC -

XRT79L71
1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC - REGISTER/MAP DESCRIPTION
Transmit PLCP Processor - B1 Byte Error Mask Register (Address = 0x119A)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
TxPLCP_B1_Byte_Mask[7:0]
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
BIT 1
R/W
0
REV. 1.0.0
BIT 0
R/W
0
BIT NUMBER
NAME
7-0
TxPLCP_B1_Byte_Mask[
7:0]
TYPE
R/W
DESCRIPTION
TxPLCP B1 Byte Error Mask Byte[7:0]:
These READ/WRITE bit-fields permit the user to insert bit errors
into the B1 bytes, within the outbound PLCP data stream.
The Transmit PLCP Processor block will perform an XOR opera-
tion with the contents of the B1 byte, and this register. The
results of this calculation will be inserted into the B1 byte position
within each outbound PLCP frame. For each bit-field (within this
register) that is set to "1", the corresponding bit, within the B1
byte will be in error.
NOTE: For normal operation, the user should set this register to
0x00.
Transmit PLCP Processor - G1 Byte Control Register (Address = 0x119B)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
Unused
Force Tx Force PLCP
PLCP FEBE FERF/RDI
to 0
R/O
R/O
R/O
R/W
R/W
R/W
0
0
0
0
0
0
BIT 1
LSS[2:0]
R/W
0
BIT 0
R/W
0
BIT NUMBER
NAME
7-5
Unused
TYPE
R/O
DESCRIPTION
203