XRT79L71_1 Datasheet, PDF (369/434 Pages) Exar Corporation – 1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC -

REV. 1.0.0
XRT79L71
1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC - REGISTER/MAP DESCRIPTION
Transmit ATM Cell Processor Block - Transmit Discarded ATM Cell Count - Byte 3 (Address = 0x1F2C)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Transmit - Discard Cell Count[31:24]
RUR
RUR
RUR
RUR
RUR
RUR
RUR
RUR
0
0
0
0
0
0
0
0
BIT NUMBER
NAME
7-0
Transmit - Discard Cell
Count[31:24]
TYPE
RUR
DESCRIPTION
Transmit - Discard Cell Count - Byte 3[7:0]:
This RESET-upon-READ register, along with the Transmit ATM
Cell Processor Block - Transmit ATM Cell Discard Cell Count -
Bytes 2 through 0 registers, contain a 32-bit value for the num-
ber of ATM cells that have been discarded by the Transmit ATM
Cell Processor block.
This particular register contains the MSB (Most Significant Byte)
value of this 32-bit expression.
NOTES:
1. The contents within these register includes all ATM
cells that contain either a HEC Byte error or a Transmit
UTOPIA Parity error.
2. If the number of Cells reaches the value
"0xFFFFFFFFF" then these registers will saturate to
and remain at this value (e.g., it will NOT overflow to
"0x00000000").
Transmit ATM Cell Processor Block - Transmit Discarded ATM Cell Count - Byte 2 (Address = 0x1F2D)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Transmit - Discard Cell Count[23:16]
RUR
RUR
RUR
RUR
RUR
RUR
RUR
RUR
0
0
0
0
0
0
0
0
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