English
Language : 

XRT79L71_1 Datasheet, PDF (359/434 Pages) Exar Corporation – 1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC -
REV. 1.0.0
XRT79L71
1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC - REGISTER/MAP DESCRIPTION
BIT NUMBER
NAME
7-0
Transmit Cell Insertion/
Extraction Memory
Data[15:8]
TYPE
R/W
DESCRIPTION
Transmit Cell Insertion/Extraction Memory Data[15:8]:
These READ/WRITE bit-fields, along with that in the Transmit
ATM Cell Processor Block - Transmit Cell Insertion/Extraction
Memory Data - Bytes 3, 2 and 0 support the following functions.
a. They function as the address location for the user to write
the contents of an Outbound ATM cell into the Transmit
Cell Insertion Memory, via the Microprocessor Interface.
b. They function as the address location, for which the user
to read out the contents of an inbound ATM cell from the
Receive Cell Extraction Memory, via the Microprocessor
Interface.
NOTES:
1. If the user performs a WRITE operation to this (and the
other three address locations), then the user is writing
ATM cell data into the Transmit Cell Insertion Memory.
2. If the user performs a READ operation to this (and the
other three address locations), then the user is reading
ATM cell data from the Transmit Cell Extraction
Memory.
3. READ and WRITE operations must be performed in a
32-bit (4-byte word) manner. Hence, whenever the
user performs a READ/WRITE operation to these
address locations, the user must start by writing in or
reading out the first byte (of this 4-byte word) of a given
ATM cell, into/from the Transmit ATM Cell Processor
Block - Transmit Cell Insertion/Extraction Memory -
Byte 3 register. Next, the user must perform the READ/
WRITE operation (with the second of this 4-byte word)
to the Transmit ATM Cell Processor Block - Transmit
Cell Insertion/Extraction Memory - Byte 2 register.
Afterwards, the user must perform a READ/WRITE
operation (with the third of this 4-byte word) to this
particular register location. Finally, the user must
perform a READ/WRITE operation (with the fourth of
this 4-byte word) to the Transmit ATM Cell Processor
Block - Transmit Cell Insertion/Extraction Memory -
Byte 0 register. When reading out (writing in) the next
four bytes of a given ATM Cell, the user must repeat
this process with a READ or WRITE operation, from/to
this register location, and so on.
4. Whenever the user is writing cell data into the Transmit
Cell Insertion Memory, the size of the Cell is always 56
bytes.
5. Whenever the user is reading cell data from the
Transmit Cell Extraction Memory, the size of the Cell is
always 56 bytes.
350