XRT79L71_1 Datasheet, PDF (48/434 Pages) Exar Corporation – 1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC -

XRT79L71
1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC - REGISTER/MAP DESCRIPTION
RECEIVE UTOPIA INTERFACE BLOCK - ATM UNI APPLICATIONS
REV. 1.0.0
This section presents the Register Description/Address Map of the control registers associated with the
Receive UTOPIA Interface block for ATM UNI Applications. The Register Description/Address Map of these
control registers for PPP Applications will be presented in the next sectionfor ATM UNI Applications. The
Register Description/Address Map of these control registers for PPP Applications will be presented in the next
section.
TABLE 2: RECEIVE UTOPIA INTERFACE BLOCK - REGISTER/ADDRESS MAP - ATM UNI APPLICATIONS
ADDRESS LOCATION
REGISTER NAME
TYPE
DEFAULT
VALUE
RECEIVE UTOPIA INTERFACE - CONTROL REGISTERS
0x0500
Reserved
R/O
0x00
0x0501
Receive UTOPIA Interface - Receive Control Register
R/W
0x00
0x0502
Receive UTOPIA Interface - Receive Control Register - Byte 1
R/W
0x00
0x0503
Receive UTOPIA Interface - Receive Control Register - Byte 0
R/W
0x00
0x0504 - 0x0512 Reserved
R/O
0x00
0x0513
Receive UTOPA Interface - Port Address Register
R/W
0x00
0x0514 - 0x0516 Reserved
R/O
0x00
0x0517
Receive UTOPIA Interface - Port Number Register
R/W
0x00
0x0518 - 0x057F Reserved
R/O
0x00
Receive UTOPIA Interface - Receive Control Register - Byte 0 (Address = 0x0503)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Receive
UTOPIA
Level 3
Enable
Multi-PHY
Polling
Enable
Back to Back Direct Sta- Receive UTOPIA Data Bus
Polling tus Indication
Width [1:0]
Enable
Enable
Cell Size[1:0]
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
1
1
0
0
1
1
1
1
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