XRT79L71_1 Datasheet, PDF (223/434 Pages) Exar Corporation – 1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC -

REV. 1.0.0
XRT79L71
1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC - REGISTER/MAP DESCRIPTION
BIT
NUMBER
NAME
0
TxLEV
TYPE
R/W
DEFAULT
VALUE
0
DESCRIPTION
Transmit Line Build-Out Select:
This READ/WRITE bit-field permits the user to either enable
or disable the Transmit Line Build-Out (e.g., pulse-shaping)
circuit within the Transmit DS3/E3 LIU Block. The user
should set this bit-field to either "0" or to "1" based upon the
following guidelines.
0 - If the cable length between the Transmit Output (of the
corresponding Channel) and the DSX-3/STSX-1 location is
225 feet or less.
1 - If the cable length between the Transmit Output (of the
corresponding Channel) and the DSX-3/STSX-1 location is
225 feet or more.
The user must follow these guidelines in order to insure that
the Transmit Transmit DS3/E3 Framer block (of XRT79L71)
will always generate a DS3 pulse that complies with the Iso-
lated Pulse Template requirements per Bellcore GR-499-
CORE.
NOTE: This bit-field is ignored if the XRT79L71 has been
configured to operate in the E3 Mode.
LIU Receive Control Register (Address = 0x1305)
BIT 7
BIT 6
BIT 5
BIT 4
Unused
Disable
DLOS
Detector
Disable
ALOS Detec-
tor
R/O
R/O
R/W
R/W
0
0
0
0
BIT 3
Unused
R/O
0
BIT 2
LOSMUT
Enable
R/W
0
BIT 1
Receive
Monitor
Mode Enable
R/W
0
BIT 0
Receive
Equalizer
Enable
R/W
0
BIT
NUMBER
NAME
7 - 6 Unused
5
Disable DLOS Detector
TYPE
R/O
R/W
DEFAULT
VALUE
0
0
DESCRIPTION
Disable Digital LOS Detector:
This READ/WRITE bit-field permits the user to either enable
or disable the Digital LOS (Loss of Signal) Detector within
the Receive DS3/E3 LIU Block, of the XRT79L71, as
described below.
0 - Enables the Digital LOS Detector within the Receive
DS3/E3 LIU Block.
NOTE: This is the default condition.
1 - Disables the Digital LOS Detector within the Receive
DS3/E3 LIU Block.
NOTE: This bit-field is only active if XRT79L71 has been
configured to operate in the DS3 Mode.
214