XRT79L71_1 Datasheet, PDF (187/434 Pages) Exar Corporation – 1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC -

REV. 1.0.0
XRT79L71
1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC - REGISTER/MAP DESCRIPTION
BIT NUMBER
NAME
7-0
TxFA2_Mask_Byte[7:0]
TYPE
R/W
DESCRIPTION
TxFA2 Error Mask Byte[7:0]:
These READ/WRITE bit-fields permit the user to insert bit errors
into the FA2 bytes, within the outbound E3 data stream.
The Transmit E3 Framer block will perform an XOR operation
with the contents of the FA2 byte, and this register. The results
of this calculation will be inserted into the FA2 byte position
within the Outbound E3 data stream. For each bit-field (within
this register) that is set to "1", the corresponding bit, within the
FA2 byte will be in error.
NOTE: For normal operation, the user should set this register to
0x00.
Transmit E3 BIP-8 Error Mask Register - G.832 (Address = 0x114A)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
TxBIP-8_Mask_Byte[7:0]
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
BIT 1
R/W
0
BIT 0
R/W
0
BIT NUMBER
NAME
7-0
TxBIP-8_Mask_Byte[7:0]
TYPE
R/W
DESCRIPTION
TxBIP-8 (B1) Error Mask[7:0]:
These READ/WRITE bit-fields permit the user to insert bit errors
into the B1 bytes, within the outbound E3 data stream.
The Transmit E3 Framer block will perform an XOR operation
with the contents of the B1 byte, and this register. The results of
this calculation will be inserted into the B1 byte position within
the Outbound E3 data stream. For each bit-field (within this reg-
ister) that is set to "1", the corresponding bit, within the B1 byte
will be in error.
For normal operation, the user should set this register to 0x00.
Transmit E3 SSM Register - G.832 (Address = 0x114B)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
TxSSM
Enable
Unused
R/W
R/O
R/O
R/O
R/W
0
0
0
0
0
BIT 2
BIT 1
TxSSM[3:0]
R/W
R/W
0
0
BIT 0
R/W
0
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