XRT79L71_1 Datasheet, PDF (267/434 Pages) Exar Corporation – 1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC -

REV. 1.0.0
XRT79L71
1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC - REGISTER/MAP DESCRIPTION
Receive ATM Cell Processor Block - Receive Discarded ATM Cell Count - Byte 0 (Address = 0x172F)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Receive - Discarded ATM Cell Count[7:0]
RUR
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RUR
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0
0
0
0
0
0
0
0
BIT NUMBER
NAME
7-0
Receive -Discard ATM
Cell Count[7:0]
TYPE
RUR
DESCRIPTION
Receive - Discarded ATM Cell Count[7:0]:
These RESET-upon-READ bit-fields, along with that within the
Receive ATM Cell Processor Block - Receive Discarded ATM
Cell Count - Bytes 3 through 1 registers contain the 32-bit
expression for the number of cells that have been discarded
since the last read of these registers.This particular register byte
contains the LSB (Least Significant Byte) of this 32-bit value for
the number of Received ATM cells.
NOTES:
1. The contents within these register bytes do include Idle
Cells that have been discarded by one of the User Cell
Filters.
2. The contents within these register bytes do include
those cells that have been discarded due to
uncorrectable HEC byte errors, User Cell Filtering, or
improper writes into the Receive FIFO.
3. If the number of Discarded ATM Cells reaches the
value "0xFFFFFFFF" then these registers will saturate
to and remain at this value (e.g., it will not overflow to
"0x00000000").
Receive ATM Cell Processor Block - Receive ATM Cells with Correctable HEC Byte Error Count
Register - Byte 3 (Address = 0x1730)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Received Cells with Correctable HEC Byte Error Count[31:24]
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0
0
0
0
0
0
0
0
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