XRT79L71_1 Datasheet, PDF (323/434 Pages) Exar Corporation – 1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC -

REV. 1.0.0
XRT79L71
1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC - REGISTER/MAP DESCRIPTION
BIT NUMBER
NAME
2
Descramble Enable
1
Delete FCS from
Incoming Packet
0
Receive PPP Packet
Processor Block Enable
TYPE
R/W
R/W
R/W
DESCRIPTION
De-Scramble Enable:
This READ/WRITE bit-field permits the user to either enable or
disable the De-Scrambler within the Receive PPP Packet Pro-
cessor block. If the user invokes this features, then the De-
Scrambler will use the X^43+1 scrambling polynomial on the
payload data within each incoming PPP Packet.
0 - Disables the De-Scrambler within the Receive PPP Packet
Processor block.
1 - Enables the De-Scrambler within the Receive PPP Packet
Processor block.
NOTE: This bit-field is only active if the XRT79L71 has been
configured to operate in the PPP Mode.
Delete FCS from the Incoming PPP Packets:
This READ/WRITE bit-field permits the user to configure the
Receive PPP Packet Processor block to either retain or remove
the FCS byte-fields (from the incoming PPP packet) after it has
been verified and prior to it being output via the Receive POS-
PHY Interface.
0 - Configures the Receive PPP Packet Processor block to retain
the FCS byte-fields within each incoming PPP packet, prior to
routing it to the Receive POS-PHY Interface block.
1 - Configures the Receive PPP Packet Processor block to
remove the FCS byte-fields from each incoming PPP packet,
prior to routing it to the Receive POS-PHY Interface block.
NOTE: This bit-field is only active if the XRT79L71 has been
configured to operate in the PPP Mode.
Receive PPP Packet Processor Block Enable:
This READ/WRITE bit-field permits the user to either enable or
disable the Receive PPP Packet Processor block. If the user
wishes to operate the XRT79L71 in the PPP Mode, then the user
must enable the Receive PPP Packet Processor block.
0 - Disables the Receive PPP Packet Processor block.
1 - Enables the Receive PPP Packet Processor block.
NOTES:
1. This bit-field is only active if the XRT79L71 has been
configured to operate in the PPP Mode.
2. The user can invoke a Software RESET to the Receive
PPP Packet Processor block by momentarily setting
this bit-field to "0".
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