XRT79L71_1 Datasheet, PDF (429/434 Pages) Exar Corporation – 1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC -

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XRT79L71
1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC - REGISTER/MAP DESCRIPTION
BIT NUMBER
NAME
7-0
Transmit User Cell Filter
# 3 - Filtered Cell
Count[7:0]
TYPE
RUR
DESCRIPTION
Transmit User Cell Filter # 3 - Filtered Cell Count[7:0]:
These RESET-upon-READ bit-fields, along with that in the
Transmit ATM Cell Processor Block - Transmit User Cell Filter #
3 - Filtered Cell Count - Bytes 3 through 1 register contain a 32-
bit expression for the number of User Cells that have been fil-
tered by Transmit User Cell Filter # 3 since the last read of this
register.
Depending upon the configuration settings within the Transmit
ATM Cell Processor Block - Transmit User Cell Filter Control -
Transmit User Cell Filter # 3 Register (Address = 0x1F63), these
register bits will be incremented anytime Transmit User Cell Fil-
ter # 3 performs any of the following functions.
• Discards an incoming User Cell.·
• Copies (or Replicates) an incoming User Cell and routes the
copy to the Transmit Cell Extraction Buffer.
• Both of these actions.
This particular register contains the LSB (Least Significant Byte)
value for this 32-bit expression.
NOTE:
If the number of filtered cells reaches the value
"0xFFFFFFFF" then these registers will saturate to and
remain at this value (e.g., it will not overflow to
"0x00000000").
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