XRT79L71_1 Datasheet, PDF (320/434 Pages) Exar Corporation – 1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC -

XRT79L71
1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC - REGISTER/MAP DESCRIPTION
REV. 1.0.0
BIT NUMBER
NAME
7-0
User Cell Filter # 3 - Fil-
tered Cell Count[7:0]
TYPE
RUR
DESCRIPTION
User Cell Filter # 3 - Filtered Cell Count[7:0]:
These RESET-upon-READ bit-fields, along with that in the
Receive ATM Cell Processor Block - Receive User Cell Filter # 3
- Filtered Cell Count - Bytes 3 through 1 register contain a 32-bit
expression for the number of User Cells that have been filtered
by User Cell Filter # 3 since the last read of this register.
Depending upon the configuration settings within the Receive
ATM Cell Processor Block - Receive User Cell Filter Control -
User Cell Filter # 3 Register (Address = 0x1773), these register
bits will be incremented anytime User Cell Filter # 3 performs
any of the following functions.
• Discards an incoming User Cell.·
• Copies (or Replicates) an incoming User Cell and routes the
copy to the Receive Cell Extraction Buffer.·
• Both of these actions.
This particular register contains the LSB (Least Significant Byte)
value for this 32-bit expression.
NOTE:
If the number of filtered cells reaches the value
"0xFFFFFFFF" then these registers will saturate to and
remain at this value (e.g., it will not overflow to
"0x00000000").
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