XRT79L71_1 Datasheet, PDF (350/434 Pages) Exar Corporation – 1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC -

XRT79L71
1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC - REGISTER/MAP DESCRIPTION
REV. 1.0.0
Transmit ATM Cell Processor Block - Transmit ATM Interrupt Enable Register (Address = 0x1F0F)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Unused
Transmit Cell
Extraction
Interrupt
Enable
Transmit Cell
Insertion
Interrupt
Enable
Transmit Cell
Extraction
Memory
Overflow
Interrupt
Enable
Transmit Cell
Insertion
Memory
Overflow
Interrupt
Enable
Detection of
HEC Byte
Error
Interrupt
Enable
Detection of
Transmit
UTOPIA
Parity Error
Interrupt
Enable
R/O
R/O
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
BIT NUMBER
NAME
7-6
Unused
5
Transmit Cell Extraction
Interrupt Enable
4
Transmit Cell Insertion
Interrupt Enable
3
Transmit Cell Extraction
Memory Overflow
Interrupt Enable
TYPE
DESCRIPTION
R/W Transmit Cell Extraction Interrupt Enable:
This READ/WRITE bit-field permits the user to either enable or
disable the Transmit Cell Extraction Interrupt.
If the user enables this feature, then the Transmit ATM Cell Pro-
cessor block will generate the Transmit Cell Extraction Interrupt
anytime it receives an incoming ATM cell (from the TxFIFO) and
loads this ATM cell into the Transmit Extraction Memory Buffer.
0 - Disables the Transmit Cell Extraction Interrupt.
1 - Enables the Transmit Cell Extraction Interrupt
R/W Transmit Cell Insertion Interrupt Enable:
This READ/WRITE bit-field permits the user to either enable or
disable the Transmit Cell Insertion Interrupt.
If the user enables this feature, then the Transmit ATM Cell Pro-
cessor block will generate the Transmit Cell Insertion Interrupt
anytime a cell (residing in the Transmit Cell Insertion Buffer) is
read out of the Transmit Cell Insertion Buffer and is loaded into
the Outbound ATM cell traffic.
0 - Disables the Transmit Cell Insertion Interrupt.
1 - Enables the Transmit Cell Insertion Interrupt.
R/W Transmit Cell Extraction Memory Overflow Interrupt Enable:
This READ/WRITE bit-field permits the user to either enable or
disable the Transmit Cell Extraction Memory Overflow Interrupt.
If the user enables this interrupt, then the Transmit ATM Cell
Processor block will generate an interrupt any time an overflow
event has occurred in the Transmit Cell Extraction Memory
buffer.
0 - Disables the Transmit Cell Extraction Memory Overflow Inter-
rupt.
1 - Enables the Transmit Cell Extraction Memory Overflow Inter-
rupt.
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