XRT79L71_1 Datasheet, PDF (195/434 Pages) Exar Corporation – 1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC -

REV. 1.0.0
XRT79L71
1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC - REGISTER/MAP DESCRIPTION
PMON PLCP BIP-8 Error Count Register - MSB (Address = 0x115A)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
PMON_PLCP - BIP-8 Error_Count_Upper_Byte[7:0]
RUR
RUR
RUR
RUR
RUR
RUR
0
0
0
0
0
0
BIT 1
RUR
0
BIT 0
RUR
0
BIT NUMBER
NAME
7-0
PMON_PLCP - BIP-
8_Error_Count_Upper
_Byte[7:0]
TYPE
RUR
DESCRIPTION
Performance Monitor - PLCP BIP-8 Error Count Register -
Upper Byte:
These RESET-upon-READ bits, along with that within the PMON
PLCP BIP-8 Error Count Register - LSB combine to reflect the
cumulative number of PLCP BIP-8 bit errors that have been
detected by the Receive PLCP Processor block, since the last
reads of this register. This register contains the Most Significant
byte of this 16-bit expression.
NOTE: These register bits are only active if the XRT79L71 has
been configured to operate in both the ATM UNI and
PLCP Modes.
PMON PLCP BIP-8 Error Count Register - LSB (Address = 0x115B)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
PMON_PLCP - BIP-8 Error_Count_Lower_Byte[7:0]
RUR
RUR
RUR
RUR
RUR
RUR
0
0
0
0
0
0
BIT 1
RUR
0
BIT 0
RUR
0
BIT NUMBER
NAME
7-0
PMON_PLCP - BIP-
8_Error_Count_Lower
_Byte[7:0]
TYPE
RUR
DESCRIPTION
Performance Monitor - PLCP BIP-8 Error Count Register -
Lower Byte:
These RESET-upon-READ bits, along with that within the PMON
PLCP BIP-8 Error Count Register - MSB combine to reflect the
cumulative number of PLCP BIP-8 bit errors that have been
detected by the Receive PLCP Processor block, since the last
reads of this register. This register contains the Least Significant
byte of this 16-bit expression.
These register bits are only active if the XRT79L71 has been
configured to operate in both the ATM UNI and PLCP Modes.
PMON PLCP Framing Byte Error Count Register - MSB (Address = 0x115C)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
PMON_PLCP - Framing Error_Count_Upper_Byte[7:0]
RUR
RUR
RUR
RUR
RUR
RUR
0
0
0
0
0
0
BIT 1
RUR
0
BIT 0
RUR
0
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