XRT79L71_1 Datasheet, PDF (352/434 Pages) Exar Corporation – 1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC -

XRT79L71
1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC - REGISTER/MAP DESCRIPTION
REV. 1.0.0
Transmit ATM Cell Processor Block - Transmit ATM Cell Insertion/Extraction Memory Control Register
(0x1F13)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Unused
Transmit Cell
Extraction
Memory
RESET*
Transmit Cell
Extraction
Memory
CLAV
Transmit Cell
Insertion
Memory
RESET*
Transmit Cell
Insertion
Memory
ROOM
Transmit Cell
Insertion
Memory
WSOC
R/O
R/O
R/O
R/W
R/O
R/W
R/O
W/O
0
0
0
1
0
1
0
0
BIT NUMBER
NAME
7-5
Unused
4
Transmit Cell Extraction
Memory RESET*
3
Transmit Cell Extraction
Memory CLAV
TYPE
DESCRIPTION
R/W Transmit Cell Extraction Memory RESET*:
This READ/WRITE bit-field permits the user to perform a REST
operation to the Transmit Cell Extraction Memory.
If the user writes a "1" to "0" transition into this bit-field, then the
following events will occur.
a. All of the contents of the Transmit Cell Extraction Memory
will be flushed.
b. All READ and WRITE pointers will be reset to their default
positions.
NOTE: Following this RESET event, the user must write the
value "1" into this bit-field in order to enable normal
operation within the Transmit Cell Extraction Memory.
R/O Transmit Cell Extraction Memory - Cell Available Indicator:
This READ-ONLY bit-field indicates whether or not there is at
least ATM cell of data (residing within the Transmit Cell Extrac-
tion Memory) that needs to be read out via the Microprocessor
Interface.
0 - Indicates that the Transmit Cell Extraction Memory is empty
and contains no ATM cell data.
1 - Indicates that the Transmit Cell Extraction Memory contains
at least one ATM cell of data that needs to be read out.
NOTE: The user should validate each ATM cell that is being read
out from the Transmit Cell Extraction memory by
checking the state of this bit-field prior to reading out the
contents of ATM cell data residing within the Transmit
Cell Extraction Memory
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