XRT79L71_1 Datasheet, PDF (103/434 Pages) Exar Corporation – 1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC -

REV. 1.0.0
XRT79L71
1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC - REGISTER/MAP DESCRIPTION
BIT NUMBER
NAME
3
Change in FERF/RDI
Defect Condition Inter-
rupt Enable
2
Detection of BIP-4 Error
Interrupt Enable
1
Detection of FAS Bit
Error Interrupt Enable
0
Unused
TYPE
R/W
R/W
R/W
R/O
DESCRIPTION
Change in FERF/RDI Defect Condition Interrupt:
Enable:This READ/WRITE bit-field permits the user to either
enable or disable the Change in FERF/RDI Defect Condition
Interrupt. If the user enables this interrupt, then the Receive
DS3/E3 Framer block will generate an interrupt in response to
either of the following events.
• Whenever the Receive E3 Framer block declares the FERF/
RDI Defect condition.
• Whenever the Receive E3 Framer block clears the FERF/RDI
Defect condition.
The user can enable or disable this particular interrupt as
described below.
0 - Disables the Change in FERF/RDI Defect Condition Interrupt.
1 - Enables the Change in FERF/RDI Condition Interrupt.
NOTE: This bit-field is ignored if the Receive E3 Framer block is
configured to verify BIP-4 values within each incoming
E3 frame.
Detection of BIP-4 Error Interrupt Enable:
This READ/WRITE bit-field permits the user to either enable or
disable the Detection of BIP-4 Error Interrupt. If the user
enables this interrupt, then the Receive E3 Framer block will
generate an interrupt anytime it detects a BIP-4 error, within the
incoming E3 data stream.
The user can enable or disable this interrupt as described below.
0 - Disables the Detection of BIP-4 Error Interrupt.
1 - Enables the Detection of BIP-4 Error Interrupt.
NOTE: This bit-field is only active, if the Receive E3 Framer
block has been configured to compute and verify the
BIP-4 values within each incoming E3 frame.
Detection of FAS (Framing Alignment Signal) Bit Error Inter-
rupt Enable:
This READ/WRITE bit-field permits the user to either enable or
disable the FAS Bit Error Interrupt. If the user enables this inter-
rupt, then the Receive E3 Framer block will generate an interrupt
anytime it detects an FAS error within the incoming E3 data
stream.
0 - Disables the Detection of FAS Bit Error Interrupt.
1 - Enables the Detection of FAS Bit Error Interrupt.
Please set to "0" (the default value) for normal operation.
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