XRT79L71_1 Datasheet, PDF (219/434 Pages) Exar Corporation – 1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC -

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XRT79L71
1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC - REGISTER/MAP DESCRIPTION
BIT
NUMBER
NAME
4
Analog LOS Defect
Declared
TYPE
R/O
DEFAULT
VALUE
0
DESCRIPTION
Analog LOS Defect Declared:
This READ-ONLY bit-field indicates whether or not the Ana-
log LOS (Loss of Signal) detector is declaring the LOS
Defect condition.
For DS3 application, the Analog LOS Detector (within the
Receive DS3/E3 LIU Block) will declare the LOS Defect
condition whenever it determines that the amplitude of the
pulses (within the incoming DS3 line signal) drops below a
certain Analog LOS Defect Declaration threshold level.
Conversely, (again for DS3 application) the Analog LOS
Detector will clear the LOS Defect condition whenever it
determines that the amplitude of the pulses (within the
incoming DS3 line signal) has risen above a certain Analog
LOS Defect Clearance threshold level.
It should be noted that, in order to prevent chattering within
the Analog LOS Detector output, there is some built-in hys-
teresis between the Analog LOS Defect Declaration and the
Analog LOS Defect Clearance threshold levels.
0 - Indicates that the Analog LOS Detector is NOT declaring
the LOS Defect Condition.
1 - Indicates that the Analog LOS Detector is currently
declaring the LOS Defect condition.
NOTES:
1. LOS Detection (within the Receive DS3/E3 LIU
Block) is performed by both an Analog LOS
Detector and a Digital LOS Detector. The LOS
state of the Receive DS3/E3 LIU Block is simply a
WIRED-OR of the LOS Defect Declare states of
these two detectors.2.
2. The current LOS Defect Condition (per the
Receive DS3/E3 LIU Block) can be determined by
reading out the contents of Bit 1 (Receive LOS
Defect Declared) within this register.
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