XRT79L71_1 Datasheet, PDF (244/434 Pages) Exar Corporation – 1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC -

XRT79L71
1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC - REGISTER/MAP DESCRIPTION
REV. 1.0.0
Receive ATM Cell Processor Block - Receive ATM Interrupt Enable Register - Byte 1 (Address =
0x170E)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Unused
Receive Cell
Extraction
Interrupt
Enable
R/O
R/O
R/O
R/O
R/O
R/O
R/O
R/W
0
0
0
0
0
0
0
0
BIT NUMBER
NAME
7-1
Unused
0
Receive Cell Extraction
Interrupt Enable
TYPE
R/O
R/W
DESCRIPTION
Receive Cell Extraction Interrupt Enable:
This READ/WRITE bit-field permits the user to either enable or
disable the Receive Cell Extraction Interrupt.
If the user enables this interrupt, then the Receive ATM Cell Pro-
cessor block will generate the Receive Cell Extraction Interrupt
anytime it receives an incoming ATM cell (from traffic) and loads
an ATM cell into the Extraction Memory Buffer.
0 - Disables the Receive Cell Extraction Interrupt.
1 - Enables the Receive Cell Extraction Interrupt.
Receive ATM Cell Processor Block - Receive ATM Interrupt Enable Register - Byte 0 (Address = 0x170F)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Receive Cell
Insertion
Interrupt
Enable
Receive
FIFO Over-
flow Inter-
rupt Enable
Receive Cell
Extraction
Memory
Overflow
Interrupt
Enable
Receive Cell
Insertion
Memory
Overflow
Interrupt
Enable
Detection of
Correctable
HEC Byte
Error
Interrupt
Enable
Detection of
Uncorrect-
able HEC
Byte Error
Interrupt
Enable
Clearance of Declaration
LCD Inter- of LCD Inter-
rupt Enable rupt Enable
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
BIT NUMBER
NAME
7
Receive Cell Insertion
Interrupt Enable
TYPE
R/W
DESCRIPTION
Receive Cell Insertion Interrupt Enable:
This READ/WRITE bit-field permits the user to either enable or
disable the Receive Cell Insertion Interrupt.
If the user enables this feature, then the Receive ATM Cell Pro-
cessor block will generate the Receive Cell Insertion Interrupt
anytime a cell (residing in the Receive Cell Insertion Buffer) is
read out of the Receive Cell Insertion Buffer and is loaded into
the incoming ATM cell traffic.
0 - Disables the Receive Cell Insertion Interrupt.
1 - Enables the Receive Cell Insertion Interrupt
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