XRT79L71_1 Datasheet, PDF (186/434 Pages) Exar Corporation – 1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC -

XRT79L71
1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC - REGISTER/MAP DESCRIPTION
REV. 1.0.0
BIT NUMBER
NAME
7-0
TxTTB_Byte_15[7:0]
TYPE
R/W
DESCRIPTION
Transmit Trail-Trace Message - Byte 15:
These READ/WRITE bits permit the user to specify the contents
of the 16th (and last) byte within the Trail-Trace Message that is
to be transported via the outbound E3 data stream.
NOTE: In order to permit the proper reception of this particular
Trail-Trace Message, it is imperative that the user set the
MSB (Most Significant bit) within this register to "0".
Transmit E3 FA1 Byte Error Mask Register - G.832 (Address = 0x1148)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
TxFA1_Mask_Byte[7:0]
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
BIT 1
R/W
0
BIT 0
R/W
0
BIT NUMBER
NAME
7-0
TxFA1_Mask_Byte[7:0]
TYPE
R/W
DESCRIPTION
TxFA1 Error Mask Byte[7:0]:
These READ/WRITE bit-fields permit the user to insert bit errors
into the FA1 bytes, within the outbound E3 data stream.
The Transmit E3 Framer block will perform an XOR operation
with the contents of the FA1 byte, and this register. The results
of this calculation will be inserted into the FA1 byte position
within the Outbound E3 data stream. For each bit-field (within
this register) that is set to "1", the corresponding bit, within the
FA1 byte will be in error.
NOTE: For normal operation, the user should set this register to
0x00.
Transmit E3 FA2 Byte Error Mask Register - G.832 (Address = 0x1149)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
TxFA2_Mask_Byte[7:0]
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
BIT 1
R/W
0
BIT 0
R/W
0
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