XRT79L71_1 Datasheet, PDF (336/434 Pages) Exar Corporation – 1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC -

XRT79L71
1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC - REGISTER/MAP DESCRIPTION
THE TRANSMIT ATM CELL PROCESSOR BLOCK
REV. 1.0.0
This section presents the Register Description/Address Map of the control registers associated with the
Transmit ATM Cell Processor block.
TRANSMIT ATM CELL PROCESSOR/PPP PACKET PROCESSOR BLOCK - REGISTER/ADDRESS MAP
ADDRESS LOCATION
REGISTER NAME
TYPE
DEFAULT
VALUE
TRANSMIT ATM CELL PROCESSOR/PPP PROCESSOR BLOCK CONTROL REGISTERS
0x1F00
Transmit ATM Cell Processor Control Register - Byte 3
R/W
0x00
0x1F01
Transmit ATM Cell Processor Control Register - Byte 2
R/W
0x00
0x1F02
Transmit ATM Cell Processor Control Register - Byte 1
R/W
0x00
0x1F03
Transmit ATM Cell/PPP Processor Control Register - Byte 0
R/W
0x00
0x1F04 - 0x1F06 Reserved
R/O
0x00
0x1F07
Transmit ATM Status Register
R/O
0x00
0x1F05 - 0x1F0A Reserved
R/O
0x00
0x1F0B
Transmit ATM Cell/PPP Processor Interrupt Status Register
RUR
0x00
0x1F0C - 0x1F0E Reserved
R/O
0x00
0x1F0F
Transmit ATM Cell/PPP Processor Interrupt Enable Register
R/W
0x00
0x1F10 - 0x1F12 Reserved
R/O
0x00
0x1F13
Transmit ATM Cell Insertion/Extraction Memory Control Register
R/O & R/W 0x00
0x1F14
Transmit ATM Cell Insertion/Extraction Memory - Byte 3
R/W
0x00
0x1F15
Transmit ATM Cell Insertion/Extraction Memory - Byte 2
R/W
0x00
0x1F16
Transmit ATM Cell Insertion/Extraction Memory - Byte 1
R/W
0x00
0x1F17
Transmit ATM Cell Insertion/Extraction Memory - Byte 0
R/W
0x00
0x1F18
Transmit ATM Cell - Idle Cell Header Byte # 1 Register
R/W
0x00
0x1F19
Transmit ATM Cell - Idle Cell Header Byte # 2 Register
R/W
0x00
0x1F1A
Transmit ATM Cell - Idle Cell Header Byte # 3 Register
R/W
0x00
0x1F1B
Transmit ATM Cell - Idle Cell Header Byte # 4 Register
R/W
0x00
0x1F1C - 0x1F1E Reserved
R/O
0x00
0x1F1F
Transmit ATM Cell - Idle Cell Payload Byte Register
R/W
0x00
0x1F20
Transmit ATM Cell - Test Cell Header Byte # 1 Register
R/W
0x00
0x1F21
Transmit ATM Cell - Test Cell Header Byte # 2 Register
R/W
0x00
0x1F22
Transmit ATM Cell - Test Cell Header Byte # 3 Register
R/W
0x00
0x1F23
Transmit ATM Cell - Test Cell Header Byte # 4 Register
R/W
0x00
0x1F24 - 0x1F27 Reserved
R/O
0x00
0x1F28
Transmit ATM Cell - Cell Count Register - Byte 3
RUR
0x00
0x1F29
Transmit ATM Cell - Cell Count Register - Byte 2
RUR
0x00
327