XRT79L71_1 Datasheet, PDF (190/434 Pages) Exar Corporation – 1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC -

XRT79L71
1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC - REGISTER/MAP DESCRIPTION
PMON Line Code Violation Count Registers - MSB (Address = 0x1150)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
PMON_LCV_Count_Upper_Byte[7:0]
RUR
RUR
RUR
RUR
RUR
RUR
0
0
0
0
0
0
BIT 1
RUR
0
REV. 1.0.0
BIT 0
RUR
0
BIT NUMBER
NAME
7-0
PMON LCV Count Upper
Byte[7:0]
TYPE
RUR
DESCRIPTION
Performance Monitor- Line Code Violation Count Register -
Upper Byte:
These RESET-upon-READ bits along with that within the PMON
Line Code Violation Count - LSB combine to reflect the cumula-
tive number of Line Code Violations that have been detected by
the Receive DS3/E3 Framer block, since the last read of this
register.
This register contains the Most Significant byte of this 16-bit
expression.
PMON Line Code Violation Count Registers - LSB (Address = 0x1151)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
PMON_LCV_Count_Lower_Byte[7:0]
RUR
RUR
RUR
RUR
RUR
RUR
0
0
0
0
0
0
BIT 1
RUR
0
BIT 0
RUR
0
BIT NUMBER
NAME
7-0
PMON LCV Count Lower
Byte[7:0]
TYPE
RUR
DESCRIPTION
Performance Monitor- Line Code Violation Count Register -
Lower Byte:
These RESET-upon-READ bits along with that within the PMON
Line Code Violation Count - MSB combine to reflect the cumula-
tive number of Line Code Violations that have been detected by
the Receive DS3/E3 Framer block, since the last read of this
register.
This register contains the Least Significant byte of this 16-bit
expression.
PMON Framing Bit/Byte Error Count Register - MSB (Address = 0x1152)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
PMON_Framing_Bit/Byte_Error_Count_Upper_Byte[7:0]
RUR
RUR
RUR
RUR
RUR
RUR
0
0
0
0
0
0
BIT 1
RUR
0
BIT 0
RUR
0
181