XRT79L71_1 Datasheet, PDF (106/434 Pages) Exar Corporation – 1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC -

XRT79L71
1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC - REGISTER/MAP DESCRIPTION
REV. 1.0.0
BIT NUMBER
NAME
0
Change in AIS Defect
Condition Interrupt Status
TYPE
RUR
DESCRIPTION
Change of AIS Defect Condition Interrupt Status:
This RESET-upon-READ bit-field indicates whether or not the
Change of AIS Defect Condition Interrupt has occurred since the
last read of this register.
If this interrupt is enabled, then the Receive E3 Framer block
generates an interrupt in response to either of the following con-
dition.
• Whenever the Receive E3 Framer block declares the AIS
Defect Condition.
• Whenever the Receive E3 Framer block clears the AIS Defect
Condition.
0 - Indicates that the Change of AIS Defect Condition Interrupt
has NOT occurred since the last read of this register.
1 - Indicates that the Change of AIS Defect Condition Interrupt
has occurred since the last read of this register.
NOTE: The user can obtain the current AIS defect condition of
the Receive E3 Framer block by reading out the state of
Bit 3 (AIS Defect Condition Declared) within the Receive
E3 Configuration and Status # 2 - G.751 (Address =
0x1111).
Receive E3 Interrupt Status Register # 2 - G.751 (Address = 0x1115)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
Unused
Change of
FERF/RDI
Defect
Condition
Interrupt
Status
Detection of
BIP-4 Error
Interrupt
Status
Detection of
FAS Bit
Error
Interrupt
Status
R/O
R/O
R/O
R/O
RUR
RUR
RUR
0
0
0
0
0
0
0
BIT 0
Reserved
R/O
0
BIT NUMBER
NAME
7-4
Unused
TYPE
R/O
DESCRIPTION
97