XRT79L71_1 Datasheet, PDF (49/434 Pages) Exar Corporation – 1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC -

REV. 1.0.0
XRT79L71
1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC - REGISTER/MAP DESCRIPTION
BIT NUMBER
NAME
7
Receive UTOPIA Level 3
Enable
6
Multi-PHY Polling Enable
TYPE
R/W
R/W
DESCRIPTION
Receive UTOPIA Level 3 Enable:
This READ/WRITE bit-field permits the user to configure the
Receive UTOPIA Interface block to operate in either the UTOPIA
Level 1 or 2 or UTOPIA Level 3 Modes, as described below.
0 - Configures the Receive UTOPIA Interface block to operate in
the UTOPIA Level 1 or 2 Mode.
1 - Configures the Receive UTOPIA Interface block to operate in
the UTOPIA Level 3 Mode.
NOTE:
This particular bit-field only configures the Receive
UTOPIA Interface block. The user must set Bit 7
(UTOPIA Level 3 Enable) within the Transmit UTOPIA
Control Register - Byte 0 (Address = 0x0583) in order to
configure the Transmit UTOPIA Interface block into the
appropriate UTOPIA Level).
Multi-PHY Polling Enable:
This READ/WRITE bit-field permits the user to either enable or
disable Multi-PHY Polling for the Receive UTOPIA Interface
block. If the user implements this feature (and configures the
XRT79L71 to operate in the Multi-PHY Mode) then the RxUClav
output pin will be driven (either "High" or "Low") based upon the
fill-status of the Receive FIFO within the Channel that corre-
sponds to the Receive UTOPIA Address that is currently being
applied to the RxUAddr[4:0] input pins.
If the user does not implement this feature (and then configures
the XRT79L71 to operate in the Single-PHY Mode), then the
RxUClav output pin will unconditionally reflect the Receive FIFO
fill-status for Channel 0. No attention will be paid to the address
values placed upon the RxUAddr[4:0] input pins.
0 - Configures the Receive UTOPIA Interface block to operate in
the Single-PHY Mode.
1 - Configures the Receive UTOPIA Interface block to operate in
the Multi-PHY Mode.
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