XRT79L71_1 Datasheet, PDF (255/434 Pages) Exar Corporation – 1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC -

REV. 1.0.0
XRT79L71
1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC - REGISTER/MAP DESCRIPTION
BIT NUMBER
NAME
7-0
Receive Cell Insertion/
Extraction Memory
Data[7:0]
TYPE
R/W
DESCRIPTION
Receive Cell Insertion/Extraction Memory Data[7:0]:
These READ/WRITE bit-fields, along with that in the Receive
ATM Cell Processor Block - Receive Cell Insertion/Extraction
Memory Data - Bytes 3 through 1 support the following functions.
They function as the address location, for which the user to write
the contents of an Outbound ATM cell into the Receive Cell
Insertion Memory, via the Microprocessor Interface.
They function as the address location, for which the user to read
out the contents of an inbound ATM cell from the Receive Cell
Extraction Memory, via the Microprocessor Interface.
NOTES:
1. If the user performs a WRITE operation to this (and the
other three address locations), then the user is writing
ATM cell data into the Receive Cell Insertion Memory.
2. If the user performs a READ operation to this (and the
other three address locations), then the user is writing
ATM cell data into the Receive Cell Insertion Memory.
3. READ and WRITE operations must be performed in a
32-bit (4-byte word) manner. Hence, whenever the
user performs a READ/WRITE operation to these
address locations, the user must start by writing in or
reading out the first byte (of this 4-byte word) of a given
ATM cell, into/from the Receive ATM Cell Processor
Block - Receive Cell Insertion/Extraction Memory - Byte
3 register. Next, the user must perform a READ/
WRITE operation (with the second of this 4-byte word)
to the Receive ATM Cell Processor block - Receive Cell
Insertion/Extraction Memory - Byte 2 register.
Afterwards, the user must perform a READ/WRITE
operation (with the third of this 4-byte word) to the
Receive ATM Cell Processor Block - Receive Cell
Insertion/Extraction Memory Byte 1 register. Finally,
the user must perform a READ/WRITE operation (with
the fourth of this 4-byte word) to the Receive ATM Cell
Processor Block - Receive Cell Insertion/Extraction
Memory - Byte 0. When reading out (writing in) the
next four bytes of a given ATM cell, the user must
repeat this process with a READ or WRITE operation,
to the Receive ATM Cell Processor Block - Receive
Cell Insertion/Extraction Memory - Byte 3, and so on.
4. Whenever the user is writing cell data into the Receive
Cell Insertion Memory, the size of the Cell is always 56
bytes.
5. Whenever the user is reading cell data from the
Receive Cell Extraction Memory, the size of the Cell is
always 56 bytes.
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