XRT79L71_1 Datasheet, PDF (193/434 Pages) Exar Corporation – 1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC -

REV. 1.0.0
XRT79L71
1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC - REGISTER/MAP DESCRIPTION
BIT NUMBER
NAME
7-0
PMON_FEBE
Event_Count_Upper
Byte[7:0]
TYPE
RUR
DESCRIPTION
Performance Monitor - FEBE Event Count - Upper Byte:
These RESET-upon-READ bits, along with that within the PMON
FEBE Event Count Register - LSB combine to reflect the cumu-
lative number of erred FEBE events that have been detected by
the Receive DS3/E3 Framer block, since the last read of this
register. This register contains the Most Significant byte of this
16-bit expression.
PMON FEBE Event Count Register - LSB (Address = 0x1157)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
PMON_FEBE_Event_Count_Lower_Byte[7:0]
RUR
RUR
RUR
RUR
RUR
RUR
0
0
0
0
0
0
BIT 1
RUR
0
BIT 0
RUR
0
BIT NUMBER
NAME
7-0
PMON_FEBE
Event_Count_Lower
Byte[7:0]
TYPE
RUR
DESCRIPTION
Performance Monitor - FEBE Event Count - Lower Byte:
These RESET-upon-READ bits, along with that within the PMON
FEBE Event Count Register - MSB combine to reflect the cumu-
lative number of erred FEBE events that have been detected by
the Receive DS3/E3 Framer block, since the last read of this
register. This register contains the Least Significant byte of this
16-bit expression.
PMON CP-Bit Error Count Register - MSB (Address = 0x1158)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
PMON_CP-Bit_Error_Count_Upper_Byte[7:0]
RUR
RUR
RUR
RUR
RUR
RUR
0
0
0
0
0
0
BIT 1
RUR
0
BIT 0
RUR
0
BIT NUMBER
NAME
7-0
PMON_CP-Bit
Error_Count_Upper
Byte[7:0]
TYPE
RUR
DESCRIPTION
Performance Monitor - CP Bit Error Count - Upper Byte:
These RESET-upon-READ bits, along with that within the PMON
CP-Bit Error Count Register - LSB combine to reflect the cumu-
lative number of CP bit errors that have been detected by the
Receive DS3 Framer block, since the last read of this register.
This register contains the Most Significant byte of this 16-bit
expression.
NOTE: These register bits are only active if the XRT79L71 has
been configured to operate in the DS3 C-Bit Parity
Framing format.
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