XRT79L71_1 Datasheet, PDF (119/434 Pages) Exar Corporation – 1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC -

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XRT79L71
1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC - REGISTER/MAP DESCRIPTION
BIT NUMBER
NAME
4
COFA Interrupt Status
3
Change in OOF Defect
Condition Interrupt Status
TYPE
RUR
RUR
DESCRIPTION
COFA Interrupt Status:
This RESET-upon-READ bit-field indicates whether or not the
COFA (Change of Framing Alignment) Interrupt has occurred
since the last read of this register.
If this interrupt is enabled, then the Receive E3 Framer block will
generate an interrupt anytime it detects a new Framing Align-
ment with the incoming E3 data-stream.
0 - Indicates that the COFA Interrupt has not occurred since the
last of this register.
1 - Indicates that the COFA Interrupt has occurred since the last
read of this register.
Change in OOF (Out of Frame) Defect Condition Interrupt
Status:
This RESET-upon-READ bit-field indicates whether or not the
Change in OOF Defect Condition Interrupt has occurred since
the last read of this register.
If this interrupt is enabled, then the Receive E3 Framer block will
generate the Change in OOF Defect Condition Interrupt in
response to the following events.
• When the Receive E3 Framer block declares the OOF Defect
Condition
• When the Receive E3 Framer block clears the OOF Defect
Condition.
0 - Indicates that the Change in OOF Defect Condition Interrupt
has not occurred since the last of this register.
1 - Indicates that the Change in OOF Defect Condition Interrupt
has occurred since the last read of this register.
NOTE:
The user can determine the current state of the OOF
Defect Condition by reading out the contents of Bit 5
(OOF Defect Condition Declared) within the Receive E3
Configuration and Status Register # 2 - G.832 (Address
= 0x1111).
110