XRT79L71_1 Datasheet, PDF (284/434 Pages) Exar Corporation – 1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC -

XRT79L71
1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC - REGISTER/MAP DESCRIPTION
REV. 1.0.0
BIT NUMBER
NAME
7-0
Receive User Cell Filter #
0 - Filtered Cell
Count[15:8]
TYPE
RUR
DESCRIPTION
Receive User Cell Filter # 0 - Filtered Cell Count[15:8]:
These RESET-upon-READ bit-fields, along with that in the
Receive ATM Cell Processor Block - Receive User Cell Filter # 0
- Filtered Cell Count - Bytes 3, 2 and 0 register contain a 32-bit
expression for the number of User Cells that have been filtered
by Receive User Cell Filter # 0 since the last read of this register.
Depending upon the configuration settings within the Receive
ATM Cell Processor Block - Receive User Cell Filter Control -
Receive User Cell Filter # 0 Register (Address = 0x1743), these
register bits will be incremented anytime Receive User Cell Filter
# 0 performs any of the following functions.
• Discards an incoming User Cell.
• Copies (or Replicates) an incoming User Cell and routes the
copy to the Receive Cell Extraction Buffer.·
• Both of these actions.
NOTE:
If the number of filtered cells reaches the value
"0xFFFFFFFF" then these registers will saturate to and
remain at this value (e.g., it will not overflow to
"0x00000000").
Receive ATM Cell Processor Block - Receive User Cell Filter # 0 - Filtered Cell Count - Byte 0 (Address
= 0x174F)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Receive User Cell Filter # 0 - Filtered Cell Count[7:0]
RUR
RUR
RUR
RUR
RUR
RUR
RUR
RUR
0
0
0
0
0
0
0
0
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