XRT79L71_1 Datasheet, PDF (147/434 Pages) Exar Corporation – 1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC -

REV. 1.0.0
XRT79L71
1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC - REGISTER/MAP DESCRIPTION
Transmit DS3 F-Bit Mask # 2 Register (Address = 0x1137)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
F_Bit
Mask [23]/
UDL Bit# 6
(C63)
F_Bit
Mask [22]/
UDL Bit# 5
(C62)
F_Bit
Mask [21]/
UDL Bit # 4
(C61)
F_Bit
Mask [20]
F_Bit
F_Bit
F_Bit
Mask [19]/DL Mask [18]/DL Mask [17]/DL
Bit # 3 (C53) Bit # 2 (C52) Bit# 1 (C51)
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
BIT 0
F_Bit
Mask [16]
R/W
0
BIT NUMBER
NAME
7
F Bit Mask[23]/UDL Bit #
6 (C63)
TYPE
R/W
DESCRIPTION
Transmit F-Bit Error - Bit 24/UDL Bit # 6 (C63):
The exact function of this register bit depends upon the following
parameters.
• Whether the XRT79L71 has been configured to operate in the
Clear-Channel Framer Mode, or not.
• Whether Bit 7 (TxOHSrc), within the Test Register (Address =
0x110C) is set to "1" or "0".
If the XRT79L71 is NOT configured to operate in the Clear-
Channel Framer Mode, OR if TxOHSrc = "0" - Transmit F-Bit
Error - Bit 24:
This READ/WRITE bit-field permits the user to configure the
Transmit DS3 Framer block to transmit DS3 frames with an
erred F bit.
This F-bit corresponds with the 24th F-bit, within a given out-
bound DS3 frame. The Transmit DS3 Framer block will perform
an XOR operation with the contents of this bit-field and value of
the 24th F-bit. The results of this calculation will be written back
into the 24th F-bit position, within each outbound DS3 frame.
The user should set this bit-field to "0" for normal (e.g., un-erred)
operation.
If the XRT79L71 is configured to operate in the Clear-Chan-
nel Framer Mode, AND if TxOHSrc = "1" - Insert Enable for
UDL Bit # 6 or C63 bit:
This READ/WRITE bit-field permits the user to configure the
Transmit Payload Data Input Interface block to externally accept
an overhead bit and insert it into the UDL Bit # 6 (or C63) bit-
fields, within the outbound DS3 data-stream.
0 - Configures the Transmit Direction circuitry to externally
accept and insert data into this overhead bit-field.
1- Configures the Transmit Direction circuitry to NOT externally
accept and insert data into this overhead bit-field.
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