XRT79L71_1 Datasheet, PDF (246/434 Pages) Exar Corporation – 1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC -

XRT79L71
1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC - REGISTER/MAP DESCRIPTION
REV. 1.0.0
BIT NUMBER
NAME
2
Detection of Uncorrect-
able HEC Byte Error
Interrupt Enable
1
Clearance of LCD Inter-
rupt Enable
0
Declaration of LCD Inter-
rupt Enable
TYPE
R/W
R/W
R/W
DESCRIPTION
Detection of Uncorrectable HEC Byte Error Interrupt Enable:
This READ/WRITE bit-field permits the user to either enable or
disable the Detection of Uncorrectable HEC Byte Error Interrupt
within the Receive ATM Cell Processor block.
If the user enables this interrupt, then the Receive ATM Cell Pro-
cessor block will generate an interrupt each time it receives an
ATM cell (in incoming traffic) that contains an uncorrectable HEC
Byte error.
0 - Disables the Detection of Uncorrectable HEC Byte Error
Interrupt.
1 - Enables the Detection of Uncorrectable HEC Byte Error Inter-
rupt.
Clearance of LCD (Loss of Cell Delineation) Defect Condi-
tion Interrupt Enable:
This READ/WRITE bit-field permits the user to either enable or
disable the Clearance of LCD Interrupt.
If the user enables this interrupt, then the Receive ATM Cell Pro-
cessor block will generate an interrupt, anytime it clears the LCD
(Loss of Cell Delineation) defect condition.
0 - Disables the Clearance of LCD Defect Condition Interrupt.
1 - Enables the Clearance of LCD Defect Condition Interrupt.
Declaration of LCD (Loss of Cell Delineation) Defect Condi-
tion Interrupt Enable:
This READ/WRITE bit-field permits the user to either enable or
disable the Declaration of LCD Interrupt.
If the user enables this interrupt, then the Receive ATM Cell Pro-
cessor block will generate an interrupt, anytime it declares the
LCD defect condition.
0 - Disables the Declaration of LCD Defect Condition Interrupt.
1 - Enables the Declaration of LCD Defect Condition Interrupt.
Receive ATM Cell Processor Block - Receive ATM Cell Insertion/Extraction Memory Control Register
(Address = 0x1713)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Unused
Receive Cell
Extraction
Memory
RESET*
Receive Cell
Extraction
Memory
CLAV
Receive Cell
Insertion
Memory
RESET*
Receive Cell
Insertion
Memory
ROOM
Receive Cell
Insertion
Memory
WSOC
R/O
R/O
R/O
R/W
R/O
R/W
R/O
W/O
0
0
0
1
0
1
0
0
BIT NUMBER
NAME
7-5
Unused
TYPE
R/O
DESCRIPTION
237