XRT79L71_1 Datasheet, PDF (39/434 Pages) Exar Corporation – 1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC -

REV. 1.0.0
XRT79L71
1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC - REGISTER/MAP DESCRIPTION
Operation Interrupt Enable Register - Byte 0 (Address = 0x0117)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
Unused
Receive
ATM Cell/
PPP Proces-
sor Block
Interrupt
Enable
BIT 2
Unused
BIT 1
BIT 0
Transmit
ATM Cell/
PPP Proces-
sor Block
Interrupt
Enable
R/W
R/O
R/O
R/W
R/W
R/O
R/O
R/W
0
0
0
0
0
0
0
0
BIT NUMBER
NAME
7-5
Unused
4
Receive
ATM Cell/PPP Processor
Block Interrupt Enable
3
Transmit
UTOPIA/POS-PHY
Interface Block Interrupt
Enable
2-1
Unused
TYPE
R/O
R/W
R/W
R/O
DESCRIPTION
Receive ATM Cell/PPP Packet Processor Block Interrupt
Enable:
This READ/WRITE bit permit the user to either enable or disable
the Receive ATM Cell/PPP Packet Processor Block for interrupt
generation. If the user writes a "0" to this register bit and dis-
ables the Receive ATM Cell/PPP Packet Processor Block (for
interrupt generation), then all Receive ATM Cell/PPP Packet
Processor Block interrupts will be disabled for interrupt genera-
tion. If the user writes a "1" to this register bit, the user will still
need to enable the individual Receive ATM Cell/PPP Packet
Processor Block interrupt(s) at the Source Level in order to
enable that particular interrupt.
0 - Disable all Receive ATM Cell/PPP Packet Processor Block
interrupts within the device.
1 - Enables the Receive ATM Cell/PPP Packet Processor Block
for interrupt generation at the Block-Level.
Transmit UTOPIA/POS-PHY Interface Block Interrupt
Enable:
This READ/WRITE bit permit the user to either enable or disable
the Transmit UTOPIA/POS-PHY Interface Block for interrupt
generation. If the user writes a "0" to this register bit and dis-
ables the Transmit UTOPIA/POS-PHY Interface Block (for inter-
rupt generation), then all Transmit UTOPIA/POS-PHY Interface
Block interrupts will be disabled for interrupt generation. If the
user writes a "1" to this register bit, the user will still need to
enable the individual Transmit UTOPIA/POS-PHY Interface
Block interrupt(s) at the Source Level in order to enable that par-
ticular interrupt.
0 - Disable all Transmit UTOPIA/POS-PHY Interface Block inter-
rupts within the device.
1 - Enables the Transmit UTOPIA/POS-PHY Interface Block at
the Block-Level.
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