XRT79L71_1 Datasheet, PDF (93/434 Pages) Exar Corporation – 1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC -

REV. 1.0.0
XRT79L71
1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC - REGISTER/MAP DESCRIPTION
Receive DS3 LAPD Control Register (Address = 0x1118)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
RxLAPD
Any
Unused
R/W
R/O
R/O
R/O
R/O
0
0
0
0
0
BIT 2
Receive
LAPD
Enable
R/W
0
BIT 1
Receive
LAPD
Interrupt
Enable
R/W
0
BIT 0
Receive
APD
Interrupt
Status
RUR
0
BIT NUMBER
NAME
7
RxLAPD Any
6-3
2
Unused
Receive LAPD Enable
TYPE
R/W
R/O
R/W
DESCRIPTION
Receive LAPD - Any kind:
This READ/WRITE bit-field permits the user to configure the
Receive LAPD Controller block to receive any kind of LAPD
Message (or HDLC Message) with a size of 82 bytes or less. If
the user implements this option, then the Receive LAPD Control-
ler block will be capable of receiving any kind of HDLC Message
(with any value of header bytes). The only restriction is that the
size of the HDLC Message must not exceed 82 bytes.
0 - Does not invoke this Any Kind of HDLC Message feature. In
this case, the Receive LAPD Controller block will only receive
HDLC Messages that contains the Bellcore GR-499-CORE val-
ues for SAPI and TEI.
1 - Invokes this Any Kind of HDLC Message feature. In this
case, the Receive LAPD Controller block will be able to receive
HDLC Messages that contain any header byte values.
NOTE: The user can determine the size (or byte-count) of the
most recently received LAPD/PMDL Message, by
reading the contents of the RxLAPD Byte Count
Register (Address = 0x1184)
Receive LAPD Controller Block Enable:
This READ/WRITE bit-field permits the user to either enable or
disable the Receive LAPD Controller block within the XRT79L71.
If the user enables the Receive LAPD Controller block, then it
will immediately begin extracting out and monitoring the data
(being carried via the DL bits) within the incoming DS3 data
stream.
0 - Enables the Receive LAPD Controller block.
1 - Disables the Receive LAPD Controller block.
NOTE: This bit-field is only active if the XRT79L71 has been
configured to operate in the DS3, C-bit Parity Framing
format.
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