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TDA3MV Datasheet, PDF (91/256 Pages) Texas Instruments – TDA3x SoC for Advanced Driver Assistance Systems (ADAS) 15mm Package (ABF) Silicon Revision 2.0
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TDA3MV, TDA3MA
TDA3LX, TDA3LA
SPRS964C – JUNE 2016 – REVISED JULY 2017
(1) VDDS in this table stands for corresponding power supply (i.e. vdds_ddr1 or vdds_ddr2). For more information on the power supply
name and the corresponding ball, see POWER column.
5.7.2 Dual Voltage LVCMOS I2C DC Electrical Characteristics
Table 5-11 summarizes the DC electrical characteristics for Dual Voltage LVCMOS I2C Buffers.
NOTE
For more information on the I/O cell configurations, see the Control Module section of the
Device TRM.
Table 5-11. Dual Voltage LVCMOS I2C DC Electrical Characteristics
PARAMETER
Signal Names in MUXMODE 0: i2c2_scl; i2c1_scl; i2c1_sda; i2c2_sda;
Balls ABF: L3, L4, L6, L5;
I2C Standard Mode – 1.8 V
VIH
Input high-level threshold
VIL
Input low-level threshold
Vhys Hysteresis
II
Input current at each I/O pin with an input voltage between 0.1*VDDS to
0.9*VDDS
IOZ
IOZ(IPAD Current) at each IO pin. PAD is swept from 0 to VDDS and the
Max(I(PAD)) is measured and is reported as IOZ
CI
Input capacitance
VOL3 Output low-level threshold open-drain at 3-mA sink current
IOLmin Low-level output current @VOL=0.2*VDDS
tOF
Output fall time from VIHmin to VILmax with a bus capacitance CB from 5 pF
to 400 pF
I2C Fast Mode – 1.8 V
VIH
Input high-level threshold
VIL
Input low-level threshold
Vhys Hysteresis
II
Input current at each I/O pin with an input voltage between 0.1*VDDS to
0.9*VDDS
IOZ
IOZ(IPAD Current) at each IO pin. PAD is swept from 0 to VDDS and the
Max(I(PAD)) is measured and is reported as IOZ
CI
Input capacitance
VOL3 Output low-level threshold open-drain at 3-mA sink current
IOLmin Low-level output current @VOL=0.2*VDDS
tOF
Output fall time from VIHmin to VILmax with a bus capacitance CB from 10 pF
to 400 pF
I2C Standard Mode – 3.3 V
VIH
Input high-level threshold
VIL
Input low-level threshold
Vhys Hysteresis
II
IOZ
CI
VOL3
IOLmin
Input current at each I/O pin with an input voltage between 0.1*VDDS to
0.9*VDDS
IOZ(IPAD Current) at each IO pin. PAD is swept from 0 to VDDS and the
Max(I(PAD)) is measured and is reported as IOZ
Input capacitance
Output low-level threshold open-drain at 3-mA sink current
Low-level output current @VOL=0.4V
MIN
0.7*VDDS
0.1*VDDS
3
0.7*VDDS
0.1*VDDS
3
20+0.1*Cb
0.7*VDDS
0.05*VDD
S
31
31
3
NOM
MAX
0.3*VDDS
12
12
10
0.2*VDDS
250
0.3*VDDS
12
12
10
0.2*VDDS
250
0.3*VDDS
80
80
10
0.4
UNIT
V
V
V
µA
µA
pF
V
mA
ns
V
V
V
µA
µA
pF
V
mA
ns
V
V
V
µA
µA
pF
V
mA
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Specifications
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