TDA3MV Datasheet, PDF (211/256 Pages) Texas Instruments – TDA3x SoC for Advanced Driver Assistance Systems (ADAS) 15mm Package (ABF) Silicon Revision 2.0

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TDA3MV, TDA3MA
TDA3LX, TDA3LA
SPRS964C – JUNE 2016 – REVISED JULY 2017
LPDDR2
interface
CACLM = CACLMX + CACLMY
CACLMX
CACLMY
SPRS917_LPDDR2_15
CACLM is the longest Manhattan distance of the CK/ADDR_CTRL signal class.
Figure 8-36. CACLM for LPDDR2 Interface
Trace routing specifications for the CK and the ADD_CTRL are specified in Table 8-21.
Table 8-21. CK and ADDR_CTRL Routing Specification
NO.
PARAMETER
1 CK and ADDR_CTRL nominal trace length⁽¹⁾
MIN
TYP
MAX UNIT
CACLM mils
2 ADDR_CTRL skew
20 ps
3 CK skew
5 ps
4 Via count per each trace ADDR_CTRL, CK
2
5 Via count difference across ADDR_CTRL, CK
0
6 ADDR_CTRL-to-CK skew
7 Center-to-center ADDR_CTRL to other LPDDR2 trace spacing⁽²⁾⁽³⁾
4
8 Center-to-center ADDR_CTRL to other ADDR_CTRL trace spacing⁽²⁾
3
9 CK center-to-center spacing⁽⁴⁾
10 CK center-to-center spacing to other net⁽²⁾
4
20 ps
w
w
w
(1) CACLM is the longest Manhattan distance of ADDR_CTRL and CK.
(2) Center-to-center spacing is allowed to fall to minimum for up to 1000 mils of routed length.
(3) Other LPDDR2 trace spacing means signals that are not part of the same CK, ADDR_CTRL signal net class.
(4) CK pair spacing is set to ensure proper differential impedance. Differential impedance should be Zo x 2, where Zo is the single ended
impedance.
8.8 DDR2 Board Design and Layout Guidelines
8.8.1 DDR2 General Board Layout Guidelines
To help ensure good signaling performance, consider the following board design guidelines:
• Avoid crossing splits in the power plane.
• Minimize Vref noise.
• Use the widest trace that is practical between decoupling capacitors and memory module.
• Maintain a single reference.
• Minimize ISI by keeping impedances matched.
• Minimize crosstalk by isolating sensitive bits, such as strobes, and avoiding return path discontinuities.
• Use proper low-pass filtering on the Vref pins.
• Keep the stub length as short as possible.
• Add additional spacing for on-clock and strobe nets to eliminate crosstalk.
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Applications, Implementation, and Layout 211
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