TDA3MV Datasheet, PDF (104/256 Pages) Texas Instruments – TDA3x SoC for Advanced Driver Assistance Systems (ADAS) 15mm Package (ABF) Silicon Revision 2.0

TDA3MV, TDA3MA
TDA3LX, TDA3LA
SPRS964C – JUNE 2016 – REVISED JULY 2017
www.ti.com
Table 6-3 summarizes the OSC0 input clock electrical characteristics.
Table 6-3. OSC0 Input Clock Electrical Characteristics—Bypass Mode
NAME
f
C_IN
I_IN
DESCRIPTION
Frequency
Input capacitance
Input current (3.3V mode)
MIN
2.184
4
TYP
19.2, 20, 27
2.384
6
MAX
2.584
10
Table 6-4 details the OSC0 input clock timing requirements.
UNIT
MHz
pF
µA
Table 6-4. OSC0 Input Clock Timing Requirements
NAME
CK0
CK1
1 / t_c(xiosc0)
t_w(xiosc0)
t_j(xiosc0)
t_R(xiosc0)
t_F(xiosc0)
t_j(xiosc0)
DESCRIPTION
Frequency, xi_osc0
Pulse duration, xi_osc0 low or high
Period jitter⁽¹⁾, xi_osc0
Rise time, xi_osc0
Fall time, xi_osc0
Frequency accuracy⁽²⁾, xi_osc0
Ethernet not used
Ethernet RGMII using
derived clock
MIN
TYP
MAX
19.2, 20, 27
0.45 × t_c(xiosc0)
0.55 × t_c(xiosc0)
0.01 × t_c(xiosc0)
5
5
±200
±50
(1) Period jitter is meant here as follows:
– The maximum value is the difference between the longest measured clock period and the expected clock period
– The minimum value is the difference between the shortest measured clock period and the expected clock period
(2) Crystal characteristics should account for tolerance+stability+aging.
UNIT
MHz
ns
ns
ns
ns
ppm
ppm
xi_osc0
CK0
CK1
Figure 6-5. xi_osc0 Input Clock
CK1
SPRS91v_CLK_04
6.1.3 Auxiliary Oscillator OSC1 Input Clock
SYS_CLK2 is received directly from oscillator OSC1. For more information about SYS_CLK2 see Device
TRM, Chapter: Power, Reset, and Clock Management.
6.1.3.1 OSC1 External Crystal
An external crystal is connected to the device pins. Figure 6-6 describes the crystal implementation.
104 Clock Specifications
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