TDA3MV Datasheet, PDF (203/256 Pages) Texas Instruments – TDA3x SoC for Advanced Driver Assistance Systems (ADAS) 15mm Package (ABF) Silicon Revision 2.0

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TDA3MV, TDA3MA
TDA3LX, TDA3LA
SPRS964C – JUNE 2016 – REVISED JULY 2017
8.7.3 LPDDR2 Interface
8.7.3.1 LPDDR2 Interface Schematic
Figure 8-24 shows the schematic connections for 32-bit interface with or without ECC using one x32
LPDDR2 device.
32-Bit LPDDR2
Interface
ddr1_d[31:0]
RDAT
ddr1_dqm[3:0]
RDAT
ddr1_dqs[3:0]
RDAT
ddr1_dqsn[3:0]
RDAT
32-Bit LPDDR2
Device
DQ[31:0]
DM[3:0]
DQS_t[3:0]
DQS_c[3:0]
ddr1_ck
RCA
ddr1_nck
RCA
ddr1_cke0
RCA
ddr1_csn0
RCA
CK_t
CK_c
CKE
CS_n
ddr1_rasn (ddr1_ca0)⁽¹⁾
RCA
ddr1_casn (ddr1_ca1)⁽¹⁾
RCA
ddr1_wen (ddr1_ca2)⁽¹⁾
RCA
ddr1_a13 (ddr1_ca3)⁽¹⁾
RCA
ddr1_a10 (ddr1_ca4)⁽¹⁾
RCA
ddr1_a1 (ddr1_ca5)⁽¹⁾
RCA
ddr1_a2 (ddr1_ca6)⁽¹⁾
RCA
ddr1_ba0 (ddr1_ca7)⁽¹⁾
RCA
ddr1_ba1 (ddr1_ca8)⁽¹⁾
RCA
ddr1_ba2 (ddr1_ca9)⁽¹⁾
RCA
CA[0]
CA[1]
CA[2]
CA[3]
CA[4]
CA[5]
CA[6]
CA[7]
CA[8]
CA[9]
ddr1_ecc_d[7:0]
ddr1_dqm_ecc
ddr1_dqs_ecc
ddr1_dqsn_ecc
8
vdds_ddr
ZQ
1 K vdds_ddr
1K
ZQ0/1
Vref(CA)
Vref(DQ)
0.1 µF
0.1 µF
0.1 µF
vdds_ddr
1K
DDR_VREF
1K
SPRS917_LPDDR2_02
Figure 8-24. 32-Bit Interface with and without ECC using one x32 LPDDR2 device^(1)(3)(4)
(1) When LPDDR2 memory are used, these signal function as ddr1_ca[9:0]. For more information, see Table 4-11, EMIF1 Signal
Descriptions
(2) Rca is 10 Ω resistor and is to be placed near TDA3x device.
(3) The R_DAT is 22 Ω resistor and is to be placed near TDA3x device
(4) If ECC is required, pins available behind data lane 3 (data would then only use 16bit (lanes 1 and 2))
When not using a part of LPDDR2 interface (using x16 or not using the LPDDR2 interface):
• Connect the vdds_ddr supply to 1.8 V
• Tie off ddr1_dqsx (x=0,1,2,3) that are unused to vss via 1 kΩ
• Tie off ddr1_dqsnx (x=0,1,2,3) that are unused to vdds_ddr via 1 kΩ
• All other unused pins can be left as NC.
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Applications, Implementation, and Layout 203
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