TDA3MV Datasheet, PDF (170/256 Pages) Texas Instruments – TDA3x SoC for Advanced Driver Assistance Systems (ADAS) 15mm Package (ABF) Silicon Revision 2.0

TDA3MV, TDA3MA
TDA3LX, TDA3LA
SPRS964C – JUNE 2016 – REVISED JULY 2017
www.ti.com
(1) i in [i:0] = 3
Table 7-47. Switching Characteristics for MMC - SDR12 Mode
NO. PARAMETER
SDR120 fop(clk)
SDR121 t_w(clkH)
DESCRIPTION
Operating frequency, mmc_clk
Pulse duration, mmc_clk high
SDR122 t_w(clkL)
Pulse duration, mmc_clk low
SDR123 t_d(clkL-cmdV)
SDR124 t_d(clkL-dV)
Delay time, mmc_clk falling clock edge to mmc_cmd transition
Delay time, mmc_clk falling clock edge to mmc_dat[i:0] transition
(1) P = output mmc_clk period in ns
(2) i in [i:0] = 3
MIN
0.5*P-
0.270
0.5*P-
0.270
-19.13
-19.13
MAX
24
16.93
16.93
UNIT
MHz
ns
ns
ns
ns
mmc_clk
mmc_cmd
mmc_dat[3:0]
SDR122
SDR121
SDR120
SDR126
SDR125
SDR128
SDR127
Figure 7-41. MMC/SD/SDIOj in - SDR12 - Receiver Mode
SPRS91v_MMC_05
mmc_clk
mmc_cmd
mmc_dat[3:0]
SDR122
SDR121
SDR120
SDR123
SDR124
Figure 7-42. MMC/SD/SDIOj in - SDR12 - Transmiter Mode
SPRS91v_MMC_06
7.17.4 MMC, SD SDR25 Mode
Figure 7-43, Figure 7-44, and Table 7-48, through Table 7-49 present Timing requirements and Switching
characteristics for MMC - SD and SDIO SDR25 in receiver and transmiter mode.
NO. PARAMETER
SDR253
SDR254
SDR257
SDR258
t_{su(cmdV-clkH)}
t_h(clkH-cmdV)
t_su(dV-clkH)
t_h(clkH-dV)
Table 7-48. Timing Requirements for MMC - SDR25 Mode ⁽¹⁾
DESCRIPTION
MIN
Setup time, mmc_cmd valid before mmc_clk rising clock edge
5.3
Hold time, mmc_cmd valid after mmc_clk rising clock edge
1.6
Setup time, mmc_dat[i:0] valid before mmc_clk rising clock edge
5.3
Hold time, mmc_dat[i:0] valid after mmc_clk rising clock edge
1.6
MAX
UNIT
ns
ns
ns
ns
170 Timing Requirements and Switching Characteristics
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