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TDA3MV Datasheet, PDF (216/256 Pages) Texas Instruments – TDA3x SoC for Advanced Driver Assistance Systems (ADAS) 15mm Package (ABF) Silicon Revision 2.0
TDA3MV, TDA3MA
TDA3LX, TDA3LA
SPRS964C – JUNE 2016 – REVISED JULY 2017
www.ti.com
Complete stackup specifications are provided in Table 8-25.
Table 8-25. PCB Stackup Specifications
NO.
PARAMETER
MIN
TYP
MAX
UNIT
PS21 PCB routing/plane layers
6
PS22 Signal routing layers
3
PS23 Full ground reference layers under DDR2 routing region(1)
1
PS24 Full vdds_ddrx power reference layers under the DDR2 routing
1
region(1)
PS25 Number of reference plane cuts allowed within DDR routing region(2)
0
PS26 Number of layers between DDR2 routing layer and reference plane(3)
0
PS27 PCB routing feature size
4
Mils
PS28 PCB trace width, w
4
Mils
PS29
PS210
Single-ended impedance, Zo
Impedance control(4)
50
75
Ω
Z-5
Z
Z+5
Ω
(1) Ground reference layers are preferred over power reference layers. Be sure to include bypass caps to accommodate reference layer
return current as the trace routes switch routing layers. A full ground reference layer should be placed adjacent to each DDR routing
layer in PCB stack up.
(2) No traces should cross reference plane cuts within the DDR routing region. High-speed signal traces crossing reference plane cuts
create large return current paths which can lead to excessive crosstalk and EMI radiation.
(3) Reference planes are to be directly adjacent to the signal plane to minimize the size of the return current loop.
(4) Z is the nominal singled-ended impedance selected for the PCB specified by PS29.
216 Applications, Implementation, and Layout
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