TDA3MV Datasheet, PDF (71/256 Pages) Texas Instruments – TDA3x SoC for Advanced Driver Assistance Systems (ADAS) 15mm Package (ABF) Silicon Revision 2.0

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TDA3MV, TDA3MA
TDA3LX, TDA3LA
SPRS964C – JUNE 2016 – REVISED JULY 2017
Table 4-25. Sysboot Signal Descriptions
SIGNAL NAME
sysboot0
sysboot1
sysboot2
sysboot3
sysboot4
sysboot5
sysboot6
sysboot7
sysboot8
sysboot9
sysboot10
sysboot11
sysboot12
sysboot13
sysboot14
sysboot15
DESCRIPTION
Boot Mode Configuration 0. The value latched on this pin upon porz reset release
will determine the boot mode configuration of the device.
Boot Mode Configuration 1. The value latched on this pin upon porz reset release
will determine the boot mode configuration of the device.
Boot Mode Configuration 2. The value latched on this pin upon porz reset release
will determine the boot mode configuration of the device.
Boot Mode Configuration 3. The value latched on this pin upon porz reset release
will determine the boot mode configuration of the device.
Boot Mode Configuration 4. The value latched on this pin upon porz reset release
will determine the boot mode configuration of the device.
Boot Mode Configuration 5. The value latched on this pin upon porz reset release
will determine the boot mode configuration of the device.
Boot Mode Configuration 6. The value latched on this pin upon porz reset release
will determine the boot mode configuration of the device.
Boot Mode Configuration 7. The value latched on this pin upon porz reset release
will determine the boot mode configuration of the device.
Boot Mode Configuration 8. The value latched on this pin upon porz reset release
will determine the boot mode configuration of the device.
Boot Mode Configuration 9. The value latched on this pin upon porz reset release
will determine the boot mode configuration of the device.
Boot Mode Configuration 10. The value latched on this pin upon porz reset release
will determine the boot mode configuration of the device.
Boot Mode Configuration 11. The value latched on this pin upon porz reset release
will determine the boot mode configuration of the device.
Boot Mode Configuration 12. The value latched on this pin upon porz reset release
will determine the boot mode configuration of the device.
Boot Mode Configuration 13. The value latched on this pin upon porz reset release
will determine the boot mode configuration of the device.
Boot Mode Configuration 14. The value latched on this pin upon porz reset release
will determine the boot mode configuration of the device.
Boot Mode Configuration 15. The value latched on this pin upon porz reset release
will determine the boot mode configuration of the device.
TYPE
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
BALL
E8
A7
F8
B7
A6
F7
E7
R7
B6
A5
D6
C5
B5
D7
B4
A4
4.4.22.2 Power, Reset and Clock Management (PRCM)
NOTE
For more information, see Power, Reset, and Clock Management section of the device TRM.
Table 4-26. PRCM Signal Descriptions
SIGNAL NAME
clkout0
clkout1
clkout2
rstoutn
resetn
porz
xref_clk0
DESCRIPTION
Device Clock output 1. Can be used externally for devices with non-critical timing
requirements, or for debug, or as a reference clock on GPMC as described in
Table 7-8 GPMC/NOR Flash Interface Switching Characteristics - Synchronous
Mode - 1 Load and Table 7-10 GPMC/NOR Flash Interface Switching
Characteristics - Synchronous Mode - 5 Loads.
Device Clock output 2. Can be used as a system clock for other devices.
Device Clock output 3. Can be used as a system clock for other devices.
Reset out (Active low). This pin asserts low in response to any global reset condition
on the device.
Device Reset Input
Power on Reset (active low). This pin must be asserted low until all device supplies
are valid (see reset sequence/requirements).
External Reference Clock 0. For Audio and other Peripherals.
TYPE
O
O
O
O
I
I
I
BALL
AB17, C12, F14, F22,
M1
F12, F21, U17
A10, F20, W17
F4
G4
G3
M1
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Terminal Configuration and Functions
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